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2015-09-24drm/mgag200: Fix error handling paths in fbdev driverArchit Taneja1-8/+23
2015-09-24drm/qxl: only report first monitor as connected if we have no stateDave Airlie1-5/+7
2015-09-23drm/radeon: add quirk for MSI R7 370Maxim Sheviakov1-0/+1
2015-09-23drm/amdgpu: Sprinkle drm_modeset_lock_all to appease locking checksAlex Deucher1-0/+4
2015-09-23drm/radeon: Sprinkle drm_modeset_lock_all to appease locking checksDaniel Vetter1-0/+4
2015-09-23drm/amdgpu: sync ce and me with SWITCH_BUFFER(2)monk.liu3-92/+23
2015-09-23drm/amdgpu: integer overflow in amdgpu_mode_dumb_create()Dan Carpenter1-1/+1
2015-09-23drm/amdgpu: info leak in amdgpu_gem_metadata_ioctl()Dan Carpenter1-0/+5
2015-09-23drm/amdgpu: integer overflow in amdgpu_info_ioctl()Dan Carpenter1-2/+3
2015-09-23drm/amdgpu: unwind properly in amdgpu_cs_parser_init()Dan Carpenter1-34/+51
2015-09-23drm/amdgpu: Fix max_vblank_count value for current display enginesAlex Deucher1-1/+1
2015-09-23drm/amdgpu: use kmemdup rather than duplicating its implementationAndrzej Hajda1-3/+1
2015-09-23drm/amdgpu: fix UVD suspend and resume for VI APULeo Liu1-8/+12
2015-09-23drm/amdgpu: fix the UVD suspend sequence orderLeo Liu3-6/+6
2015-09-23drm/amdgpu: make UVD handle checking more strictLeo Liu1-27/+41
2015-09-23drm/amdgpu: Disable UVD PGLeo Liu1-1/+2
2015-09-23drm/amdgpu: more scheduler cleanups v2Christian König11-76/+87
2015-09-23drm/amdgpu: cleanup fence queue init v2Christian König2-2/+2
2015-09-23drm/amdgpu: rename fence->scheduler to sched v2Christian König10-22/+22
2015-09-23drm/amdgpu: cleanup entity initChristian König3-19/+25
2015-09-23drm/amdgpu: refine the scheduler job type conversionJunwei Zhang3-4/+6
2015-09-23drm/amdgpu: refine the job naming for amdgpu_job and amdgpu_sched_jobJunwei Zhang8-69/+71
2015-09-23drm/amdgpu: use only one reservation object for each VM v2Christian König2-30/+9
2015-09-23drm/amdgpu: validate duplicates in the CS as wellChristian König1-14/+20
2015-09-23drm/amdgpu: export reservation_object from dmabuf to ttm (v2)Christian König24-52/+70
2015-09-23drm/amdgpu: fix overflow on 32bit systemsChristian König1-1/+1
2015-09-23drm/amdgpu: remove process_job callback from the schedulerChristian König3-24/+7
2015-09-23drm/amdgpu: move scheduler fence callback into fence v2Christian König2-11/+12
2015-09-23drm/amdgpu: signal scheduler fence when hw submission fails v3Christian König1-0/+3
2015-09-23drm/amdgpu: add tracepoint for scheduler (v2)Chunming Zhou2-1/+45
2015-09-23drm/amdgpu: use write confirm for vm_flush()Christian König1-1/+2
2015-09-23drm/amdgpu: execution barrier after fence v2Anatoli Antonovitch1-0/+12
2015-09-23drm/amdgpu: add option to disable semaphoresChristian König3-1/+21
2015-09-23drm/i915: Remove extraneous request cancel.Nick Hoath1-1/+0
2015-09-23drm/i915: Enable querying offset of UV plane with intel_plane_obj_offsetTvrtko Ursulin5-7/+28
2015-09-23drm/i915: Support NV12 in rotated GGTT mappingTvrtko Ursulin3-6/+46
2015-09-23drm/i915: Support appending to the rotated pages mappingTvrtko Ursulin1-8/+13
2015-09-23drm/i915: Support planar formats in tile height calculationsTvrtko Ursulin3-7/+7
2015-09-23drm/i915/bxt: Update revision id for BXT C0Arun Siluvery1-1/+1
2015-09-23drm/i915: Parametrize CSR_PROGRAM registersVille Syrjälä1-4/+3
2015-09-23drm/i915: Parametrize DDI_BUF_TRANS registersVille Syrjälä2-11/+11
2015-09-23drm/i915: Parametrize TV luma/chroma filter registersVille Syrjälä2-12/+8
2015-09-23drm/i915: Replace raw numbers with the approproate register name in ILK turbo codeVille Syrjälä1-3/+3
2015-09-23drm/i915: Parametrize ILK turbo registersVille Syrjälä2-12/+12
2015-09-23drm/i915: Parametrize FBC_TAG registersVille Syrjälä2-2/+2
2015-09-23drm/i915: Parametrize GEN7_GT_SCRATCH and GEN7_LRA_LIMITSVille Syrjälä2-6/+6
2015-09-23drm/i915: Parametrize LRC registersVille Syrjälä3-11/+11
2015-09-23drm/i915: Don't pass sdvo_reg to intel_sdvo_select_{ddc, i2c}_bus()Ville Syrjälä1-4/+4
2015-09-23drm/i915: Ignore "digital output" and "not HDMI output" bits for eDP detectionVille Syrjälä1-2/+0
2015-09-23drm/i915: Make sure we don't detect eDP on g4xVille Syrjälä1-0/+7
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