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path: root/drivers/media/i2c/ccs-pll.h (follow)
AgeCommit message (Expand)AuthorFilesLines
2021-01-12media: ccs-pll: Switch from standard integer types to kernel onesSakari Ailus1-43/+43
2020-12-07media: ccs-pll: Add support for DDR OP system and pixel clocksSakari Ailus1-0/+2
2020-12-07media: ccs-pll: Add trivial dual PLL supportSakari Ailus1-0/+1
2020-12-07media: ccs-pll: Rework bounds checksSakari Ailus1-0/+4
2020-12-07media: ccs-pll: Check for derating and overrating, support non-derating sensorsSakari Ailus1-0/+2
2020-12-07media: ccs-pll: Add support flexible OP PLL pixel clock dividerSakari Ailus1-0/+1
2020-12-07media: ccs-pll: Support two cycles per pixel on OP domainSakari Ailus1-0/+2
2020-12-07media: ccs-pll: Add support for extended input PLL clock dividerSakari Ailus1-0/+1
2020-12-07media: ccs-pll: Add support for decoupled OP domain calculationSakari Ailus1-0/+1
2020-12-07media: ccs-pll: Add support for lane speed modelSakari Ailus1-0/+6
2020-12-07media: ccs-pll: Use the BIT macroSakari Ailus1-2/+5
2020-12-07media: ccs-pll: Document the structs in the header as well as the functionSakari Ailus1-0/+89
2020-12-07media: ccs-pll: Move the flags field down, away from 8-bit fieldsSakari Ailus1-1/+1
2020-12-07media: ccs-pll: Differentiate between CSI-2 D-PHY and C-PHYSakari Ailus1-1/+2
2020-12-07media: ccs-pll: Remove parallel bus supportSakari Ailus1-10/+4
2020-12-07media: ccs-pll: Split limits and PLL configuration into front and back partsSakari Ailus1-18/+26
2020-12-03media: ccs: Change my e-mail addressSakari Ailus1-1/+1
2020-12-03media: smiapp-pll: Rename as ccs-pllSakari Ailus1-0/+99
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