aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mmc (follow)
AgeCommit message (Collapse)AuthorFilesLines
2013-10-30mmc: core: Let mmc_set_signal_voltage take ocr as parameterUlf Hansson4-5/+7
This is yet another step of restructure code to be able to fixup the setup of the negotiated ocr mask. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: core: Let mmc_power_up|cycle take ocr as parameterUlf Hansson5-24/+16
As a step to fixup the setup of the negotiated ocr mask, we need the mmc_power_up|cycle functions to take the ocr as a parameter. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: core: Do not poll for busy with status cmd for all switch cmdsUlf Hansson3-9/+22
Some switch operations like poweroff notify, shall according to the spec not be followed by any other new commands. For these cases and when the host does'nt support MMC_CAP_WAIT_WHILE_BUSY, we must not send status commands to poll for busy detection. Instead wait for the stated timeout from the EXT_CSD before completing the request. Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org> Cc: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: sdhci-pci: Add SDIO/MMC device ID support for Intel ClovertrailEric Ernst1-0/+46
This patch adds intel_mid clovertrail SDIO and eMMC device IDs to the sdhci-pci driver. Signed-off-by: Eric Ernst <eric.ernst@linux.intel.com> Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: omap_hsmmc: remove unused no_offBalaji T K1-7/+0
With lazy disable gone, no_off is not used any more in omap_hsmmc Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: omap_hsmmc: correct max value of clkdBalaji T K1-2/+3
clock divisor can take a max value of 1023. Update code so that card init can be handled at f_min even at higher IP clock frequencies from which clock to the card is derived. Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: omap_hsmmc: fix timeout for cmd and data soft resetJianpeng Ma1-5/+5
With HSMMC_HAS_UPDATED_RESET reset of cmd/data (SRC/SRD) can be to quick and can be missed resulting in wait for software timeout. With cpu_relax timeout can be long and unpredictable. Use udelay instead for timeout implementation. Reported-by: Yuzheng Ma <mayuzheng@kedacom.com> Tested-by: Yuzheng Ma <mayuzheng@kedacom.com> Reviewed-by: Hein Tibosch <hein_tibosch@yahoo.es> Signed-off-by: Jianpeng Ma <majianpeng@gmail.com> Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: omap_hsmmc: context save and restore for DTTony Lindgren1-32/+20
We want to get rid of the omap specific platform init code callbacks as they don't play nice with device tree. Convert the context loss check to be based on a register state detection instead. Cc: Andreas Fenkart <afenkart@gmail.com> Signed-off-by: Tony Lindgren <tony@atomide.com> [add check for CON and HCTL in context save and restore function] Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-30mmc: omap_hsmmc: Fix pbias_disable for omap4Balaji T K1-1/+1
pbias_disable is set to protect the mmc pbias i/o cells in DT boot by preventing voltage switch. Currently pbias_disable is enabled only for omap3 and not for omap4 due to reg_offset difference of 0x100. Enable pbias_disable for omap4+ too by using res->start which does not include the reg_offset. Signed-off-by: Balaji T K <balajitk@ti.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci: remove unneeded call when have preset value quirkDong Aisheng1-1/+2
Remove unneeded call of call sdhci_enable_preset_value when having SDHCI_QUIRK2_PRESET_VALUE_BROKEN. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add preset value quirk for mx6Dong Aisheng1-1/+3
The i.MX6 does not support preset value feature. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: enable SDR50 tuning for imx6q/dlDong Aisheng1-1/+2
The imx6q/dl supports SDR50 tunning, enable it for a better timing on SDR50 mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add delay line setting supportDong Aisheng1-0/+18
The DLL(Delay Line) is newly added to assist in sampling read data. The DLL provides the ability to programmatically select a quantized delay (in fractions of the clock period) regardless of on-chip variations such as process, voltage and temperature (PVT). This patch adds a user interface to set slave delay line via device tree. It's usually used in high speed mode like mmc DDR mode when the signal quality is not good caused by board design, e.g. the signal path is too long. User can manually set delay line to find a suitable data sampling window for card to work properly. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add DDR mode support for mx6Dong Aisheng1-3/+14
When DDR mode is enabled, the initial pre_div should be 2. And the pre_div value should be changed accordingly from ... 02h) Base clock divided by 4 01h) Base clock divided by 2 00h) Base clock divided by 1 to .. 02h) Base clock divided by 8 01h) Base clock divided by 4 00h) Base clock divided by 2 Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci: report error once the maximum tuning loops exhausted or timeoutDong Aisheng1-0/+1
The original code missed to report an error when the maximum tuning loops exhausted or timeout, it will cause the upper layer to wrongly think the tuning process is passed. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: fix reading cap_1 register value for mx6slDong Aisheng1-0/+4
When reading CAP_1 register for mx6sl, ignore bit[0-15] as it stores CAP_2 register value which is new introduced in mx6sl. Without this fix, the max clock for mx6sl may not be correct since it's wrongly calculated by reading CAP_1 register. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add std tuning support for mx6slDong Aisheng1-17/+73
The mx6sl supports standard sdhci tuning, then esdhc_executing_tuning is only needed for mx6q/dl. We introduce is_imx6_usdhc() and is_imx6sl_usdhc() to handle the difference. The standard tuning is enabled by setting ESDHC_TUNE_CTRL_STD_TUNING_EN bit in new register ESDHC_TUNE_CTRL and operates with new tuning bits defined in SDHCI_ACMD12_ERR register. Note: mx6sl can also work on the old manually tuning mode as mx6q/dl if not enable standard tuning mode. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: create struct esdhc_soc_dataShawn Guo1-45/+41
Create a struct esdhc_soc_data with moving 'flags' field from pltfm_imx_data into it, and pass the pointer of this SoC specific data structure through of_device_id.data directly, so that the translation from enum imx_esdhc_type to flags can be saved. With the change, enum imx_esdhc_type can be eliminated, since we can implement the is_imx*_esdhc() by checking the esdhc_soc_data pointer. The unused is_imx35_esdhc() and is_imx51_esdhc() are also removed, and the others are kept there as we will need to use them to handle some small register differences later, where use of new flags might be a little overkilled. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: pdev->id_entry should be immutableShawn Guo1-14/+7
As a good practice, device driver should not modify pdev->id_entry but keep it immutable. Let's assign of_device_id.data with imx_esdhc_type constants directly, so that we do not have to manipulate pdev->id_entry in .probe(). As the result, sdhci-esdhc-imx53 and sdhci-usdhc-imx6q can be removed from platform_device_id table now, since they will only probe from device tree. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_USDHCShawn Guo1-12/+25
Add flag ESDHC_FLAG_USDHC to tell that the ESDHC is actually an USDHC block, and replace the is_imx6q_usdhc() occurrences with inline function esdhc_is_usdhc() which checks the flag. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-esdhc-imx: add flag ESDHC_FLAG_ENGCM07207Shawn Guo1-2/+10
Just like the use of the flag ESDHC_FLAG_MULTIBLK_NO_INT, let's add another flag ESDHC_FLAG_ENGCM07207 to enable the workaround for errata ENGcm07207 and set the flag for i.MX25 and i.MX35 ESDHC. While at it, let's use BIT() macro for ESDHC_FLAG_MULTIBLK_NO_INT as well. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Dong Aisheng <b29396@freescale.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: bfin_sdh: Forgot to write SDH_CFG register in function set_ios.Sonic Zhang1-2/+1
The DMA operation in SDIO CMD53 may fail because the 4 bit SDIO mode is not set up correctly on BF548. Remove 2 blank lines as well. Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: wmt-sdmmc: Simplify wmt_set_sd_power implementationAxel Lin1-22/+8
Simplify the code to set/clear BM_SD_OFF bit: | power_inverted: 0 | power_inverted: 1 ------------------------------------------------- enable: 0 | SET BM_SD_OFF | CLEAR BM_SD_OFF ------------------------------------------------- enable: 1 | CLEAR BM_SD_OFF | SET BM_SD_OFF Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Tony Prisk <linux@prisktech.co.nz> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-21mmc: sdhci-pci: add Intel Merrifield supportDavid Cohen1-0/+30
Implement initial SDHCI Intel Merrifield support. This patch is based on previous one from Yunpeng Gao <yunpeng.gao@intel.com>. Signed-off-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-10-19Merge 3.12-rc6 into driver-core-nextGreg Kroah-Hartman1-8/+8
We want these fixes here too. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-10-16MMC: convert bus code to use dev_groupsGreg Kroah-Hartman2-14/+19
The dev_attrs field of struct bus_type is going away soon, dev_groups should be used instead. This converts the MMC bus code to use the correct field. Cc: Chris Ball <cjb@laptop.org> Cc: Ulf Hansson <ulf.hansson@linaro.org> Cc: Konstantin Dorfman <kdorfman@codeaurora.org> Cc: Seungwon Jeon <tgih.jun@samsung.com> Cc: <linux-mmc@vger.kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-09-27mmc: sdhci-esdhc-imx: set actual_clock in clock settingDong Aisheng2-2/+3
This enables access the actual_clock via sys. root@imx6qsabreauto:~# cat /sys/kernel/debug/mmc0/ios clock: 198000000 Hz actual clock: 198000000 Hz vdd: 17 (2.9 ~ 3.0 V) bus mode: 2 (push-pull) chip select: 0 (don't care) power mode: 2 (on) bus width: 2 (4 bits) timing spec: 6 (sd uhs SDR104) signal voltage: 0 (1.80 V) Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: mvsdio: fix deferred probe from __initJohan Hovold1-5/+6
Move probe out of __init section and don't use platform_driver_probe which cannot be used with deferred probing. Since commit e9354576 ("gpiolib: Defer failed gpio requests by default") this driver might return -EPROBE_DEFER if the mmc_gpio_request_cd fails. Cc: Nicolas Pitre <nico@fluxnic.net> Cc: Chris Ball <cjb@laptop.org> Signed-off-by: Johan Hovold <jhovold@gmail.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2013-09-26mmc: sdhci-esdhc-imx: correct pre_div for imx6qDong Aisheng1-0/+3
According to spec, the pre_div for imx6q should be 1, or the biggest clock rate we can get is a half of host clock rate. This may cause we can not get the proper clock rate as we want. e.g. if the desired clock is 200Mhz, however, the host clock is 200Mhz too, then it causes the actual clock we get is 100Mhz due to pre_div is 2. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci-esdhc-imx: change pinctrl state according to uhs modeDong Aisheng1-1/+95
Without proper pinctrl state, the card may not be able to work on high speed stablely. e.g. SDR104. This patch add pinctrl state switch code according to different uhs mode include 100mhz sate, 200mhz sate and normal state (50Mhz and below). Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci-esdhc-imx: add sd3.0 SDR clock tuning supportDong Aisheng1-1/+195
Freescale i.MX6Q/DL uSDHC clock tuning progress is a little different from the standard tuning process defined in host controller spec v3.0. Thus we use platform_execute_tuning instead of standard sdhci tuning. The main difference are: 1) not only generate Buffer Read Ready interrupt when tuning is performing. It generates all other DATA interrupts like the normal data command. 2) SDHCI_CTRL_EXEC_TUNING is not automatically cleared by HW, instead it's controlled by SW. 3) SDHCI_CTRL_TUNED_CLK is not automatically set by HW, it's controlled by SW. 4) the clock delay for every tuning is set by SW. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci-esdhc-imx: support real clock on and off for imx6qDong Aisheng1-2/+17
The signal voltage switch flow requires to shutdown and output clock in a specific sequence according to standard host controller v3.0 spec. In that timing, the card must really receive clock or not. However, for i.MX6Q, the uSDHC will not output clock even the clock is enabled until there is command or data in transfer on the bus, which will then cause singal voltage switch always to fail. For i.MX6Q, we clear ESDHC_VENDOR_SPEC_FRC_SDCLK_ON bit to let controller to gate off clock automatically and set that bit to force clock output if clock is on. This is required by SD3.0 support. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci-esdhc: move common esdhc_set_clock to platform driverDong Aisheng3-41/+66
We need a lot of imx6 specific things into common esdhc_set_clock for support SD3.0 and eMMC DDR mode which is not needed for power pc platforms, so esdhc_set_clock seems not so common anymore. Instead of keeping add platform specfics things into this common API, we choose to move that code into platform driver itself to handle. This can also exclude the dependency between imx and power pc on this headfile and is easy for maintain in the future. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci: allow platform access of sdhci_send_commandDong Aisheng2-2/+4
It helps for platform code to use it send tuning commands. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-26mmc: sdhci: add hooks for platform specific tuningDong Aisheng2-0/+9
The tuning of some platforms may not follow the standard host control spec v3.0, e.g. Freescale uSDHC on i.MX6Q/DL. Add a hook here to allow execute platform specific tuning instead of standard host controller tuning. The hook only replaces the tuning process, so it's placed after tuning checking and before the real tuning process. Some notes for the tuning hook: 1) it needs handle lock itself if it wants to access host controller according platform specific implementation. 2) do not need to handle runtime pm since it executes with runtime pm get already. Signed-off-by: Dong Aisheng <b29396@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: sdhci-bcm2835: Use sdhci_pltfm_unregister instead of open codedAxel Lin1-7/+1
This avoid duplicated implementation. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Stephen Warren <swarren@wwwdotorg.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: sdhci-bcm-kona: Use sdhci_pltfm_unregister instead of open codedAxel Lin1-13/+1
This avoid duplicated implementation and also fixes missing iounmap() and release_mem_region() calls in sdhci_bcm_kona_remove(). sdhci_pltfm_init() calls request_mem_region() and ioremap(), thus we need to call the corresponding iounmap() and release_mem_region() calls in sdhci_bcm_kona_remove(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc-socfpga: Staticize dw_mci_socfpga_probeSachin Kamat1-1/+1
'dw_mci_socfpga_probe' is used only in this file. Make it static. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc-socfpga: Remove redundant of_match_ptrSachin Kamat1-1/+1
'dw_mci_socfpga_match' is always compiled in. Hence of_match_ptr is not necessary. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: mvsdio: Convert to devm_ioremap_resourceSachin Kamat1-3/+3
devm_request_and_ioremap() is deprecated. Use devm_ioremap_resource() instead. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: core: clean up duplicate macrosJackey Shen2-2/+2
Clean up the duplicate macros: mmc_sd_card_uhs -> mmc_card_uhs mmc_sd_card_set_uhs -> mmc_card_set_uhs Signed-off-by: Jackey Shen <jackey.shen@amd.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: atmel-mci: fix oops in atmci_tasklet_funcRodolfo Giometti1-6/+8
In some cases, a NULL pointer dereference happens because data is NULL when STATE_END_REQUEST case is reached in atmci_tasklet_func. Cc: <stable@vger.kernel.org> # 3.9+ Signed-off-by: Rodolfo Giometti <giometti@enneenne.com> Acked-by: Ludovic Desroches <ludovic.desroches@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: atmel-mci: abort transfer on timeout errorLudovic Desroches1-0/+7
When a software timeout occurs, the transfer is not stopped. In DMA case, it causes DMA channel to be stuck because the transfer is still active causing following transfers to be queued but not computed. Cc: <stable@vger.kernel.org> # 3.9+ Signed-off-by: Ludovic Desroches <ludovic.desroches@atmel.com> Reported-by: Alexander Morozov <etesial@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: add ignorance case for CMD13 CRC errorSeungwon Jeon1-28/+45
While speed mode is changed, CMD13 cannot be guaranteed. According to the spec., it is not recommended to use CMD13 to check the busy completion of the timing change. If CMD13 is used in this case, CRC error must be ignored. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Acked-by: Ulf Hansson <ulf.hansson@linaro.org> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: fix the transfer termination in IDMAC modeSeungwon Jeon1-3/+3
In IDMAC mode EVENT_XFER_COMPLETE is set when RI/TI of last descriptor is done. So if errors are happened in the middle of data transfers, 'dw_mci_stop_dma' during error handing can be called and eventually prevents this flag to be set. This results in permanent wait for EVENT_XFER_COMPLETE in 'dw_mci_tasklet_func'. Therefore, if dma running is stopped forcibly, EVENT_XFER_COMPLETE should be set. Reported-by: Bing Zhao <bzhao@marvell.com> Signed-off-by: Doug Anderson <dianders@chromium.org> Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Acked-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: amend use of idmac sw resetSeungwon Jeon1-6/+11
First, compiling warning along with previous change is removed. [drivers/mmc/host/dw_mmc.c:1890:7: warning: unused variable 'ctrl'] And with the recommendation in manual, IDMAC software reset is followed by dma-reset of the CTRL register in order to terminate the transfer. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: gather each reset code into functionsSeungwon Jeon1-38/+43
There are three resets in CTRL register. FIFO reset is especially used in several points with the same routine. It could be replaced with one function and the others may be applied similarly if needed. So, mci_wait_reset() is modified to allow various bit field of reset. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: rework the code related to cmd/data completionSeungwon Jeon1-63/+84
Main change corresponds to dw_mci_command_complete(). And EBE is divided into read and write. Some minor changes for code readability. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: guarantee stop-abort cmd in data errorsSeungwon Jeon1-20/+64
In error cases, DTO interrupt may or may not be generated depending on remained data. Stop/Abort command ensures DTO generation for that situation. Currently if 'stop' field of data is empty, there is no stop/abort command. So, it could hang waiting DTO. This change reinforces these cases. Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>
2013-09-25mmc: dw_mmc: fix error handling on response errorSeungwon Jeon1-5/+21
Even if response error is detected in case data command, data transfer is continued. It means that data can live in FIFO. Current handling just breaks out the request when seeing the command error. This causes kernel panic in dw_mci_read_data_pio() [host->data = NULL]. And also, FIFO should be guaranteed to be empty. Unable to handle kernel NULL pointer dereference at virtual address 00000018 <...> [<c02af814>] (dw_mci_read_data_pio+0x68/0x198) from [<c02b04b4>] (dw_mci_interrupt+0x374/0x3a0) [<c02b04b4>] (dw_mci_interrupt+0x374/0x3a0) from [<c006b094>] (handle_irq_event_percpu+0x50/0x194) [<c006b094>] (handle_irq_event_percpu+0x50/0x194) from [<c006b214>] (handle_irq_event+0x3c/0x5c) [<c006b214>] (handle_irq_event+0x3c/0x5c) from [<c006de1c>] (handle_fasteoi_irq+0xa4/0x148) [<c006de1c>] (handle_fasteoi_irq+0xa4/0x148) from [<c006aa88>] (generic_handle_irq+0x20/0x30) [<c006aa88>] (generic_handle_irq+0x20/0x30) from [<c000f154>] (handle_IRQ+0x38/0x90) [<c000f154>] (handle_IRQ+0x38/0x90) from [<c00085bc>] (gic_handle_irq+0x34/0x68) [<c00085bc>] (gic_handle_irq+0x34/0x68) from [<c0011f40>] (__irq_svc+0x40/0x70) Exception stack(0xef0b1c00 to 0xef0b1c48) 1c00: 000eb0cf ffffffff 00001300 c01a7738 ef295e10 0000000a c04df298 ef0b1dc0 1c20: ef295ec0 00000000 00000000 00000006 00000000 ef0b1c48 c02b1274 c01a7764 1c40: 20000113 ffffffff [<c0011f40>] (__irq_svc+0x40/0x70) from [<c01a7764>] (__loop_delay+0x0/0xc) Code: e1a00005 e0891006 e0662004 e12fff33 (e59a3018) ---[ end trace a7043b9ba9aed1db ]--- Kernel panic - not syncing: Fatal exception in interrupt Signed-off-by: Seungwon Jeon <tgih.jun@samsung.com> Tested-by: Alim Akhtar <alim.akhtar@samsung.com> Signed-off-by: Chris Ball <cjb@laptop.org>