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2017-04-25mtd: nand: Cleanup/rework the atmel_nand driverBoris Brezillon1-2479/+0
This is a complete rewrite of the driver whose main purpose is to support the new DT representation where the NAND controller node is now really visible in the DT and appears under the EBI bus. With this new representation, we can add other devices under the EBI bus without risking pinmuxing conflicts (the NAND controller is under the EBI bus logic and as such, share some of its pins with other devices connected on this bus). Even though the goal of this rework was not necessarily to add new features, the new driver has been designed with this in mind. With a clearer separation between the different blocks and different IP revisions, adding new functionalities should be easier (we already have plans to support SMC timing configuration so that we no longer have to rely on the configuration done by the bootloader/bootstrap). Also note that we no longer have a custom ->cmdfunc() implementation, which means we can now benefit from new features added in the core implementation for free (support for new NAND operations for example). The last thing that we gain with this rework is support for multi-chips and multi-dies chips, thanks to the clean NAND controller <-> NAND devices representation. During this transition we also dropped support for AVR32 SoCs which should soon disappear from mainline (removal of the AVR32 arch is planned for 4.12). This new driver has been tested on several platforms (at91sam9261, at91sam9g45, at91sam9x5, sama5d3 and sama5d4) to make sure it did not introduce regressions, and it's worth mentioning that old bindings are still supported (which partly explain the positive diffstat). Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Acked-by: Nicolas Ferre <nicolas.ferre@microchip.com>
2016-11-07mtd: nand: atmel: return error code of nand_scan_ident/tail() on errorMasahiro Yamada1-6/+4
The nand_scan_ident/tail() returns an appropriate error value when it fails. Use it instead of the fixed error code -ENXIO. Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com> Reviewed-by: Marek Vasut <marek.vasut@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-25Revert "mtd: atmel_nand: Support variable RB_EDGE interrupts"Wenyou Yang1-27/+8
This reverts commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Because for current SoCs, the RB_EDGE3(i.e. bit 27) of HSMC_SR register does not exist, the RB_EDGE0 (i.e. bit 24) is the ready/busy line edge status bit. It is a datasheet bug. Cc: <stable@vger.kernel.org> Fixes: commit 5ddc7bd43ccc ("mtd: atmel_nand: Support variable RB_EDGE interrupts") Signed-off-by: Wenyou Yang <wenyou.yang@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-05-05mtd: nand: atmel: set ECC algorithm explicitlyRafał Miłecki1-0/+13
This is part of process deprecating NAND_ECC_SOFT_BCH (and switching to enum nand_ecc_algo). Signed-off-by: Rafał Miłecki <zajec5@gmail.com> Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2016-05-05mtd: nand: atmel: switch to mtd_ooblayout_opsBoris Brezillon1-46/+38
Implementing the mtd_ooblayout_ops interface is the new way of exposing ECC/OOB layout to MTD users. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2016-04-19mtd: nand: atmel: use mtd_ooblayout_xxx() helpers where appropriateBoris Brezillon1-19/+31
The mtd_ooblayout_xxx() helper functions have been added to avoid direct accesses to the ecclayout field, and thus ease for future reworks. Use these helpers in all places where the oobfree[] and eccpos[] arrays where directly accessed. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2016-04-19mtd: nand: atmel: rely on generic DT parsing done in nand_scan_ident()Boris Brezillon1-60/+73
The core now takes care of parsing generic DT properties in nand_scan_ident() when nand_set_flash_node() has been called. Rely on this initialization instead of calling of_get_nand_xxx() manually. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reviewed-by: Nicolas Ferre <nicolas.ferre@atmel.com>
2016-04-19mtd: nand: atmel: correct bitflips in erased pages for pre-sama5d4 SoCsBoris Brezillon1-17/+20
New atmel SoCs are able to fix bitflips in erased pages, but old ones are still impacted by this problem. Use nand_check_erased_ecc_chunk() to handle this case. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Reported-by: Herve Codina <herve.CODINA@celad.com> Reviewed-by: Herve Codina <herve.CODINA@celad.com> Tested-by: Herve Codina <herve.CODINA@celad.com>
2016-02-12mtd: atmel_nand: Support 32-bit ECC strengthRomain Izard1-2/+17
As the SAMA5D2 controller supports the 32-bit ECC strength, accept it as a valid setting when required by the device tree or the NAND parameter page. Then configure the controller to use this new setting. For the binding: Acked-by: Rob Herring <robh@kernel.org> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: atmel_nand: Support PMECC on SAMA5D2Romain Izard1-1/+22
Starting with the SAMA5D2, there is a new revision of the Atmel PMECC controller that can correct 32 bits in each sector. This controller is not 100% compatible with the previous revision that corrected a maximum of 24 bits by sector, as some register addresses overlap. Using information from the device tree, we can configure the driver to work with both versions. For the binding: Acked-by: Rob Herring <robh@kernel.org> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-02-12mtd: atmel_nand: Support variable RB_EDGE interruptsRomain Izard1-8/+27
The NFC controller used to accelerate the NAND transfers on SAMA5 chips can use either RB_EDGE0 or RB_EDGE3 as its ready/busy interrupt bit. Use the controller's compatible string to select the correct bit. For the binding: Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Wenyou Yang <Wenyou.yang@atmel.com> Tested-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23mtd: atmel_nand: Use of_device_get_match_dataRomain Izard1-3/+1
Remove the need for forward declaration and the risk for a null pointer when accessing the private part of the compatible match table, by using the newly introduced of_device_get_match_data function. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23mtd: atmel_nand: Simplify error messagesRomain Izard1-2/+2
The error messages when the ECC controller is misconfigured through the device tree are very precise. As a result they can (and will) get obsolete when new revisions of the controller appear. Simplify them before adding the support for the new revision. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-23mtd: atmel_nand: Do not warn on bitflipsRomain Izard1-2/+2
When using multi-bit ECC, it is normal for the NAND Flash driver to correct bit errors during the life of the product. Those errors will only be cleared once a threshold has been reached, and corrections can occur regularly before this. Use only dev_dbg and not dev_info to report the bitflips, to keep the system log clean when everything works correctly. Signed-off-by: Romain Izard <romain.izard.pro@gmail.com> Acked-by: Wenyou Yang <wenyou.yang@atmel.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-07mtd: nand: make use of nand_set/get_controller_data() helpersBoris BREZILLON1-27/+28
New helpers have been added to avoid directly accessing chip->field. Use them where appropriate. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> [Brian: fixed a few rebase conflicts] Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2016-01-06mtd: nand: return consistent error codes in ecc.correct() implementationsBoris BREZILLON1-1/+1
The error code returned by the ecc.correct() are not consistent over the all implementations. Document the expected behavior in include/linux/mtd/nand.h and fix offending implementations. [Brian: this looks like a bugfix for the ECC reporting in the bf5xx_nand driver, but we haven't seen any testing results for it] Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Tested-by: Franklin S Cooper Jr. <fcooper@ti.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18mtd: nand: remove useless mtd->priv = chip assignmentsBoris BREZILLON1-1/+0
mtd_to_nand() now uses the container_of() approach to transform an mtd_info pointer into a nand_chip one. Drop useless mtd->priv assignments from NAND controller drivers. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-18mtd: nand: atmel: use the mtd instance embedded in struct nand_chipBoris BREZILLON1-6/+7
struct nand_chip now embeds an mtd device. Make use of this mtd instance. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-12-08mtd: nand: make use of mtd_to_nand() in NAND driversBoris BREZILLON1-25/+25
mtd_to_nand() was recently introduced to avoid direct accesses to the mtd->priv field. Update all NAND drivers to use it. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-11-20mtd: nand: atmel_nand: constify atmel_nand_caps structuresLABBE Corentin1-3/+3
All atmel_nand_caps are never modified, consitify them. Signed-off-by: LABBE Corentin <clabbe.montjoie@gmail.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-11-11mtd: nand: drop unnecessary partition parser dataBrian Norris1-4/+3
All of these drivers set up a parser data struct just to communicate DT partition data. This field has been deprecated and is instead supported by telling nand_scan_ident() about the 'flash_node'. This patch: * sets chip->flash_node for those drivers that didn't already (but used OF partitioning) * drops the parser data * switches to the simpler mtd_device_register() where possible, now that we've eliminated one of the auxiliary parameters Now that we've assigned chip->flash_node for these drivers, we can probably rely on nand_dt_init() to do more of the DT parsing for us, but for now, I don't want to fiddle with each of these drivers. The parsing is done in duplicate for now on some drivers. I don't think this should break things. (Famous last words.) (Rolled in some changes by Boris Brezillon) Signed-off-by: Brian Norris <computersforpeace@gmail.com> Reviewed-by: Boris Brezillon <boris.brezillon@free-electrons.com>
2015-10-13mtd: nand: pass page number to ecc->write_xxx() methodsBoris BREZILLON1-2/+4
The ->read_xxx() methods are all passed the page number the NAND controller is supposed to read, but ->write_xxx() do not have such a parameter. This is a problem if we want to properly implement data scrambling/randomization in order to mitigate MLC sensibility to repeated pattern: to prevent bitflips in adjacent pages in the same block we need to avoid repeating the same pattern at the same offset in those pages, hence the randomizer/scrambler engine need to be passed the page value in order to adapt its seed accordingly. Moreover, adding the page parameter to the ->write_xxx() methods add some consistency to the current API. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> CC: Josh Wu <josh.wu@atmel.com> CC: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> CC: Maxime Ripard <maxime.ripard@free-electrons.com> CC: Greg Kroah-Hartman <gregkh@linuxfoundation.org> CC: Huang Shijie <shijie.huang@arm.com> CC: Stefan Agner <stefan@agner.ch> CC: devel@driverdev.osuosl.org CC: linux-arm-kernel@lists.infradead.org CC: linux-kernel@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-10-13mtd: nand: atmel_nand: show parent device in sysfsFrans Klaver1-1/+1
Fix a bug where parent device symlinks aren't shown in sysfs. While at it, make use of the default owner value set by mtdcore. Signed-off-by: Frans Klaver <fransklaver@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05mtd: atmel_nand: don't map the ROM table if no pmecc table offset in DTWu, Josh1-7/+7
if atmel,pmecc-lookup-table-offset is not found in DT node, we don't need to map the ROM table as we will build a runtime gf table anyway. Reported-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-04-05mtd: atmel_nand: add a definition for the oob reserved bytesJosh Wu1-2/+3
It's better to use a macro instead of just a number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-03-11mtd: atmel_nand: check NFC busy flag by HSMC_SR instead of NFC cmd regsBoris Brezillon1-3/+2
Currently the driver read NFC command registers to get NFC busy flag. Actually this flag also can be get by reading HSMC_SR register. Use the read NFC command registers need mapping a huge memory region. To save the mapped memory region, we change to check NFC busy flag by reading HSMC_SR register. Signed-off-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-03-02mtd: atmel_nand: fix typo in dev_err error messageColin Ian King1-1/+1
Fix typo, "Unkown" -> "Unknown" Signed-off-by: Colin Ian King <colin.king@canonical.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: atmel_nand: introduce a new compatible string for sama5d4 chipWu, Josh1-1/+24
Since in SAMA5D4 chip, the PMECC can correct bit flips in erased page. So we add a DT property to indicate this hardware character. If the PMECC support correct bitflip erased page (all data are 0xff). Then we can use the PMECC correct the page and skip the erased page check. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2015-01-20mtd: atmel_nand: return max bitflips in all sectors in pmecc_correction()Wu, Josh1-3/+3
atmel_nand_pmecc_read_page() will return the total bitflips in this page. This is incorrect. As one nand page includes multiple ecc sectors, that will cause the returned total bitflips exceed ecc capablity. So this patch will make pmecc_correct() return the max bitflips of all sectors in the page. That also makes atmel_nand_pmecc_read_page() return the max bitflips. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-12-17Merge tag 'for-linus-20141215' of git://git.infradead.org/linux-mtdLinus Torvalds1-33/+87
Pull MTD updates from Brian Norris: "Summary: - Add device tree support for DoC3 - SPI NOR: Refactoring, for better layering between spi-nor.c and its driver users (e.g., m25p80.c) New flash device support Support 6-byte ID strings - NAND: New NAND driver for Allwinner SoC's (sunxi) GPMI NAND: add support for raw (no ECC) access, for testing purposes Add ATO manufacturer ID A few odd driver fixes - MTD tests: Allow testers to compensate for OOB bitflips in oobtest Fix a torturetest regression - nandsim: Support longer ID byte strings And more" * tag 'for-linus-20141215' of git://git.infradead.org/linux-mtd: (63 commits) mtd: tests: abort torturetest on erase errors mtd: physmap_of: fix potential NULL dereference mtd: spi-nor: allow NULL as chip name and try to auto detect it mtd: nand: gpmi: add raw oob access functions mtd: nand: gpmi: add proper raw access support mtd: nand: gpmi: add gpmi_copy_bits function mtd: spi-nor: factor out write_enable() for erase commands mtd: spi-nor: add support for s25fl128s mtd: spi-nor: remove the jedec_id/ext_id mtd: spi-nor: add id/id_len for flash_info{} mtd: nand: correct the comment of function nand_block_isreserved() jffs2: Drop bogus if in comment mtd: atmel_nand: replace memcpy32_toio/memcpy32_fromio with memcpy mtd: cafe_nand: drop duplicate .write_page implementation mtd: m25p80: Add support for serial flash Spansion S25FL132K MTD: m25p80: fix inconsistency in m25p_ids compared to spi_nor_ids mtd: spi-nor: improve wait-till-ready timeout loop mtd: delete unnecessary checks before two function calls mtd: nand: omap: Fix NAND enumeration on 3430 LDP mtd: nand: add ATO manufacturer info ...
2014-11-25mtd: atmel_nand: replace memcpy32_toio/memcpy32_fromio with memcpyWu, Josh1-29/+10
There is no need to use memcpy32_toio/memcpy32_fromio to transfer data between memory and NFC sram. As the NFC sram is a also a memory space not an I/O space, we can just use memcpy(). We remove the __iomem prefix for NFC sram to avoid sparse warnings. Signed-off-by: Josh Wu <josh.wu@atmel.com> Reviewed-by: Brian Norris <computersforpeace@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-11-05mtd: atmel_nand: make PMECC lookup table and offset property optionalJosh Wu1-4/+77
If there is no PMECC lookup table stored in ROM, or lookup table offset is not specified, PMECC driver should build it in DDR by itself. That make the PMECC driver work for some board which doesn't have PMECC lookup table in ROM. The PMECC use the BCH algorithm, so based on the build_gf_tables() function in lib/bch.c, we can build the Galois Field lookup table. For more information can refer to section 5.4 of PMECC controller application note: http://www.atmel.com/images/doc11127.pdf Signed-off-by: Josh Wu <josh.wu@atmel.com> Cc: devicetree@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-10-20mtd: nand: drop owner assignment from platform_driversWolfram Sang1-2/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-09-17mtd: atmel_nand: remove pmecc_bytes_per_sector, use chip->ecc.bytes insteadWu, Josh1-8/+5
For PMECC, the pmecc_bytes_per_sector has same meaning as ecc.bytes. So remove pmecc_bytes_per_sector and use ecc.bytes instead. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-17mtd: atmel_nand: remove pmecc_sector_number, use ecc.steps insteadWu, Josh1-8/+6
For PMECC, the pmecc_sector_number has same meaning as ecc.steps. So use ecc.steps to replace the pmecc_sector_number. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-09-17mtd: nand: atmel_nand: retrieve NFC clockBoris BREZILLON1-0/+25
Retrieve the NFC clock to make sure it is enabled. Make that optional to ensure compatibility with previous device trees but document it as mandatory so newer device trees will include it. Signed-off-by: Boris BREZILLON <boris.brezillon@free-electrons.com> Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: NFC: fix mtd_nandbiterrs.ko test fail when using sram writeWu, Josh1-8/+9
When enable NFC sram write, it will failed the mtd_nandbiterrs.ko test. As in driver's nfc_sram_write_page(), if ops->mode equal to MTD_OSP_RAW, driver assumes the data buffer contains one page data and one oob data followed. And driver will write the page data and oob data to nand. But this is wrong implementation. Since the data buffer don't contains the oob data to write. We should write the chip->oob_poi to nand's oob. So this patch fix it by writing the oob data from chip->oob_poi. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: remove redundant dev_err callWei Yongjun1-8/+1
There is a error message within devm_ioremap_resource already, so remove the dev_err call to avoid redundant error message. Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: add pmecc support for 512, 1k, 4k, 8k page sizeWu, Josh1-5/+11
PMECC can support 512, 1k, 2k, 4k, 8k page size. The driver currently only support 2k page size nand flash. So this patch add support to 512, 1k, 4k and 8k page size nand flash. Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-08-19mtd: atmel_nand: increase chip_delayRaphaël Poggi1-1/+1
Some nand with 8k page size like Micron MT29F32G08ABAAAWP need more than 20us. Signed-off-by: Raphaël Poggi <poggi.raph@gmail.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-21mtd: atmel_nand: NFC: support multiple interrupt handlingJosh Wu1-22/+62
Fix the following error, which sometimes happens during the NFC data transfer: atmel_nand 80000000.nand: Time out to wait for interrupt: 0x00010000 atmel_nand 80000000.nand: something wrong, No XFR_DONE interrupt comes. The root cause is that in the interrupt handler, we read the ISR but only handle one interrupt. If more than one interrupt arrive at the same time, then the second one will be lost. During the NFC data transfer. Two NFC interrupts (NFC_CMD_DONE and NFC_XFR_DONE) may come at the same time. NFC_CMD_DONE means NFC command is sent, and NFC_XFR_DONE means NFC data is transferred. This patch can handle multiple NFC interrupts at the same time. During the NFC data transfer, we need to wait for two NFC interrupts: NFC_CMD_DONE and NFC_XFR_DONE. Also we separate the completion initialization code to a nfc_prepare_interrupt(), which is paired with nfc_wait_interrupt(). We call nfc_prepare_interrupt() before sending out nfc commands, to make sure no interrupt lost. Reported-by: Matthieu CRAPET <Matthieu.CRAPET@ingenico.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-21mtd: atmel_nand: implement the nfc_device_ready() by checking the R/B bitWu, Josh1-3/+11
In nfc_device_ready(), it's more reasonable to check R/B bit in NFC_SR than waiting for the R/B interrupt. It cost less time. Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-21mtd: atmel_nand: add NFC status error checkWu, Josh1-1/+23
Add a new function to read the NFC status. Meantime, this function will check if there is any errors in NFC. Signed-off-by: Josh Wu <josh.wu@atmel.com> Tested-by: Matthieu Crapet <Matthieu.Crapet@ingenico.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-07-21mtd: atmel_nand: make ecc parameters same as definitionBo Shen1-10/+10
If the ecc parameter is not the same as definition, when the mtd core check these parameters, it will give the error result. Take the following as an example: Calculate how many bits can be corrected in one page. According to the ecc parameters definition, one page correct bits = (mtd->writesize * ecc->strength) / ecc->size take the following use case as an example: mtd->writesize = 2048 bytes ecc->strength = 4 bytes (for 512 bytes) before this patch, the ecc->size = 2048, so the result is 4 bytes. after this patch, the ecc->size = 512, so the result is 16 bytes. So, align the ecc parameters the same as definition to correct this kind of error. Signed-off-by: Bo Shen <voice.shen@atmel.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10mtd: atmel_nand: Disable subpage NAND write when using Atmel PMECCHerve Codina1-0/+1
Crash detected on sam5d35 and its pmecc nand ecc controller. The problem was a call to chip->ecc.hwctl from nand_write_subpage_hwecc (nand_base.c) when we write a sub page. chip->ecc.hwctl function is not set when we are using PMECC controller. As a workaround, set NAND_NO_SUBPAGE_WRITE for PMECC controller in order to disable sub page access in nand_write_page. Signed-off-by: Herve Codina <Herve.CODINA@celad.com> Acked-by: Josh Wu <josh.wu@atmel.com> Cc: stable@vger.kernel.org Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10mtd: atmel_nand: change log levelNicolas Ferre1-1/+1
PIO fall back is not an issue, so don't make this much noise. Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-03-10mtd: nand: force NAND_CMD_READID onto 8-bit busBrian Norris1-5/+6
The NAND command helpers tend to automatically shift the column address for x16 bus devices, since most commands expect a word address, not a byte address. The Read ID command, however, expects an 8-bit address (i.e., 0x00, 0x20, or 0x40 should not be translated to 0x00, 0x10, or 0x20). This fixes the column address for a few drivers which imitate the nand_base defaults. Note that I don't touch sh_flctl.c, since it already handles this problem slightly differently (note its comment "READID is always performed using an 8-bit bus"). I have not tested this patch, as I only have x8 parts up for testing at this point. Hopefully that can change soon... Signed-off-by: Brian Norris <computersforpeace@gmail.com> Tested-by: Ezequiel Garcia <ezequiel.garcia@free-electrons.com> Tested-By: Pekon Gupta <pekon@ti.com>
2014-01-07mtd: atmel_nand: use dev_err() instead of printk()Jingoo Han1-2/+2
Use dev_err() instead of printk() to provide a better message to userspace. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2014-01-03mtd: atmel_nand: Remove unnecessary OOM messagesJingoo Han1-3/+1
The site-specific OOM messages are unnecessary, because they duplicate the MM subsystem generic OOM message. Signed-off-by: Jingoo Han <jg1.han@samsung.com> Acked-by: Josh Wu <josh.wu@atmel.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
2013-11-20Merge branch 'next' of git://git.infradead.org/users/vkoul/slave-dmaLinus Torvalds1-2/+1
Pull slave-dmaengine changes from Vinod Koul: "This brings for slave dmaengine: - Change dma notification flag to DMA_COMPLETE from DMA_SUCCESS as dmaengine can only transfer and not verify validaty of dma transfers - Bunch of fixes across drivers: - cppi41 driver fixes from Daniel - 8 channel freescale dma engine support and updated bindings from Hongbo - msx-dma fixes and cleanup by Markus - DMAengine updates from Dan: - Bartlomiej and Dan finalized a rework of the dma address unmap implementation. - In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus [Walleij] for their review. - Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. - Some minor fixes / cleanups to mv_xor and ioatdma" * 'next' of git://git.infradead.org/users/vkoul/slave-dma: (99 commits) dma: mv_xor: Fix mis-usage of mmio 'base' and 'high_base' registers dma: mv_xor: Remove unneeded NULL address check ioat: fix ioat3_irq_reinit ioat: kill msix_single_vector support raid6test: add new corner case for ioatdma driver ioatdma: clean up sed pool kmem_cache ioatdma: fix selection of 16 vs 8 source path ioatdma: fix sed pool selection ioatdma: Fix bug in selftest after removal of DMA_MEMSET. dmatest: verbose mode dmatest: convert to dmaengine_unmap_data dmatest: add a 'wait' parameter dmatest: add basic performance metrics dmatest: add support for skipping verification and random data setup dmatest: use pseudo random numbers dmatest: support xor-only, or pq-only channels in tests dmatest: restore ability to start test at module load and init dmatest: cleanup redundant "dmatest: " prefixes dmatest: replace stored results mechanism, with uniform messages Revert "dmatest: append verify result to results" ...
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