aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mtd (follow)
AgeCommit message (Collapse)AuthorFilesLines
2019-10-07mtd: rawnand: au1550nd: Fix au_read_buf16() prototypePaul Burton1-3/+2
Commit 7e534323c416 ("mtd: rawnand: Pass a nand_chip object to chip->read_xxx() hooks") modified the prototype of the struct nand_chip read_buf function pointer. In the au1550nd driver we have 2 implementations of read_buf. The previously mentioned commit modified the au_read_buf() implementation to match the function pointer, but not au_read_buf16(). This results in a compiler warning for MIPS db1xxx_defconfig builds: drivers/mtd/nand/raw/au1550nd.c:443:57: warning: pointer type mismatch in conditional expression Fix this by updating the prototype of au_read_buf16() to take a struct nand_chip pointer as its first argument, as is expected after commit 7e534323c416 ("mtd: rawnand: Pass a nand_chip object to chip->read_xxx() hooks"). Note that this shouldn't have caused any functional issues at runtime, since the offset of the struct mtd_info within struct nand_chip is 0 making mtd_to_nand() effectively a type-cast. Signed-off-by: Paul Burton <paul.burton@mips.com> Fixes: 7e534323c416 ("mtd: rawnand: Pass a nand_chip object to chip->read_xxx() hooks") Cc: stable@vger.kernel.org # v4.20+ Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-10-04mtd: spi-nor: Fix direction of the write_sr() transferTudor Ambarus1-1/+1
write_sr() sends data to the SPI memory, fix the direction. Fixes: b35b9a10362d ("mtd: spi-nor: Move m25p80 code in spi-nor.c") Reported-by: John Garry <john.garry@huawei.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Tested-by: John Garry <john.garry@huawei.com> Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-09-22Merge tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linuxLinus Torvalds3-544/+0
Pull MIPS updates from Paul Burton: "Main MIPS changes: - boot_mem_map is removed, providing a nice cleanup made possible by the recent removal of bootmem. - Some fixes to atomics, in general providing compiler barriers for smp_mb__{before,after}_atomic plus fixes specific to Loongson CPUs or MIPS32 systems using cmpxchg64(). - Conversion to the new generic VDSO infrastructure courtesy of Vincenzo Frascino. - Removal of undefined behavior in set_io_port_base(), fixing the behavior of some MIPS kernel configurations when built with recent clang versions. - Initial MIPS32 huge page support, functional on at least Ingenic SoCs. - pte_special() is now supported for some configurations, allowing among other things generic fast GUP to be used. - Miscellaneous fixes & cleanups. And platform specific changes: - Major improvements to Ingenic SoC support from Paul Cercueil, mostly enabled by the inclusion of the new TCU (timer-counter unit) drivers he's spent a very patient year or so working on. Plus some fixes for X1000 SoCs from Zhou Yanjie. - Netgear R6200 v1 systems are now supported by the bcm47xx platform. - DT updates for BMIPS, Lantiq & Microsemi Ocelot systems" * tag 'mips_5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mips/linux: (89 commits) MIPS: Detect bad _PFN_SHIFT values MIPS: Disable pte_special() for MIPS32 with RiXi MIPS: ralink: deactivate PCI support for SOC_MT7621 mips: compat: vdso: Use legacy syscalls as fallback MIPS: Drop Loongson _CACHE_* definitions MIPS: tlbex: Remove cpu_has_local_ebase MIPS: tlbex: Simplify r3k check MIPS: Select R3k-style TLB in Kconfig MIPS: PCI: refactor ioc3 special handling mips: remove ioremap_cachable mips/atomic: Fix smp_mb__{before,after}_atomic() mips/atomic: Fix loongson_llsc_mb() wreckage mips/atomic: Fix cmpxchg64 barriers MIPS: Octeon: remove duplicated include from dma-octeon.c firmware: bcm47xx_nvram: Allow COMPILE_TEST firmware: bcm47xx_nvram: Correct size_t printf format MIPS: Treat Loongson Extensions as ASEs MIPS: Remove dev_err() usage after platform_get_irq() MIPS: dts: mscc: describe the PTP ready interrupt MIPS: dts: mscc: describe the PTP register range ...
2019-09-21Merge tag 'upstream-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifsLinus Torvalds3-11/+44
Pull UBI, UBIFS and JFFS2 updates from Richard Weinberger: "UBI: - Be less stupid when placing a fastmap anchor - Try harder to get an empty PEB in case of contention - Make ubiblock to warn if image is not a multiple of 512 UBIFS: - Various fixes in error paths JFFS2: - Various fixes in error paths" * tag 'upstream-5.4-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/rw/ubifs: jffs2: Fix memory leak in jffs2_scan_eraseblock() error path jffs2: Remove jffs2_gc_fetch_page and jffs2_gc_release_page jffs2: Fix possible null-pointer dereferences in jffs2_add_frag_to_fragtree() ubi: block: Warn if volume size is not multiple of 512 ubifs: Fix memory leak bug in alloc_ubifs_info() error path ubifs: Fix memory leak in __ubifs_node_verify_hmac error path ubifs: Fix memory leak in read_znode() error path ubi: ubi_wl_get_peb: Increase the number of attempts while getting PEB ubi: Don't do anchor move within fastmap area ubifs: Remove redundant assignment to pointer fname
2019-09-21Merge tag 'mtd/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linuxLinus Torvalds43-1414/+2273
Pull MTD updates from Richard Weinberger: "MTD core changes: - add debugfs nodes for querying the flash name and id - mtd parser reorganization SPI NOR core changes: - always use bounce buffer for register read/writes - move m25p80 code in spi-nor.c - rework hwcaps selection for the spi-mem case - rework the core in order to move the manufacturer specific code out of it: - regroup flash parameters in 'struct spi_nor_flash_parameter' - add default_init() and post_sfdp() hooks to tweak the flash parameters - introduce the ->set_4byte(), ->convert_addr() and ->setup() methods, to deal with manufacturer specific code - rework the SPI NOR lock/unlock logic - fix an error code in spi_nor_read_raw() - fix a memory leak bug - enable the debugfs for the partname and partid - add support for few flashes SPI NOR controller drivers changes: - intel-spi: - Whitelist 4B read commands - Add support for Intel Tiger Lake SPI serial flash - aspeed-smc: Add of_node_put() - hisi-sfc: add of_node_put() - cadence-quadspi: Fix QSPI RCU Schedule Stall NAND core: - Fixing typos - Adding missing of_node_put() in various drivers Raw NAND controller drivers: - Macronix: new controller driver - Omap2: fix the number of bitflips returned - Brcmnand: fix a pointer not iterating over all the page chunks - W90x900: driver removed - Onenand: fix a memory leak - Sharpsl: missing include guard - STM32: avoid warnings when building with W=1 - Ingenic: fix a coccinelle warning - r852: call a helper to simplify the code CFI core: - Kill useless initializer in mtd_do_chip_probe() - Fix a rare write failure seen on some cfi_cmdset_0002 compliant Parallel NORs - Bunch of cleanups for cfi_cmdset_0002 driver's write functions by Tokunori Ikegami" * tag 'mtd/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (77 commits) mtd: pmc551: Remove set but not used variable 'soff_lo' mtd: cfi_cmdset_0002: Fix do_erase_chip() to get chip as erasing mode mtd: sm_ftl: Fix memory leak in sm_init_zone() error path mtd: parsers: Move CMDLINE parser mtd: parsers: Move OF parser mtd: parsers: Move BCM63xx parser mtd: parsers: Move BCM47xx parser mtd: parsers: Move TI AR7 parser mtd: pismo: Simplify getting the adapter of a client mtd: phram: Module parameters add writable permissions mtd: pxa2xx: Use ioremap_cache insted of ioremap_cached mtd: spi-nor: Rename "n25q512a" to "mt25qu512a (n25q512a)" mtd: spi-nor: Add support for mt35xu02g mtd: rawnand: omap2: Fix number of bitflips reporting with ELM mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfips mtd: spi-nor: remove superfluous pass of nor->info->sector_size mtd: spi-nor: enable the debugfs for the partname and partid mtd: mtdcore: add debugfs nodes for querying the flash name and id mtd: spi-nor: hisi-sfc: Add of_node_put() before break mtd: spi-nor: aspeed-smc: Add of_node_put() ...
2019-09-19Merge branch 'work.mount2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds1-189/+0
Pull misc mount API conversions from Al Viro: "Conversions to new API for shmem and friends and for mount_mtd()-using filesystems. As for the rest of the mount API conversions in -next, some of them belong in the individual trees (e.g. binderfs one should definitely go through android folks, after getting redone on top of their changes). I'm going to drop those and send the rest (trivial ones + stuff ACKed by maintainers) in a separate series - by that point they are independent from each other. Some stuff has already migrated into individual trees (NFS conversion, for example, or FUSE stuff, etc.); those presumably will go through the regular merges from corresponding trees." * 'work.mount2' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: vfs: Make fs_parse() handle fs_param_is_fd-type params better vfs: Convert ramfs, shmem, tmpfs, devtmpfs, rootfs to use the new mount API shmem_parse_one(): switch to use of fs_parse() shmem_parse_options(): take handling a single option into a helper shmem_parse_options(): don't bother with mpol in separate variable shmem_parse_options(): use a separate structure to keep the results make shmem_fill_super() static make ramfs_fill_super() static devtmpfs: don't mix {ramfs,shmem}_fill_super() with mount_single() vfs: Convert squashfs to use the new mount API mtd: Kill mount_mtd() vfs: Convert jffs2 to use the new mount API vfs: Convert cramfs to use the new mount API vfs: Convert romfs to use the new mount API vfs: Add a single-or-reconfig keying to vfs_get_super()
2019-09-18Merge branch 'work.mount-base' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfsLinus Torvalds2-2/+178
Pull vfs mount API infrastructure updates from Al Viro: "Infrastructure bits of mount API conversions. The rest is more of per-filesystem updates and that will happen in separate pull requests" * 'work.mount-base' of git://git.kernel.org/pub/scm/linux/kernel/git/viro/vfs: mtd: Provide fs_context-aware mount_mtd() replacement vfs: Create fs_context-aware mount_bdev() replacement new helper: get_tree_keyed() vfs: set fs_context::user_ns for reconfigure
2019-09-15mtd: pmc551: Remove set but not used variable 'soff_lo'zhengbin1-6/+3
Fixes gcc '-Wunused-but-set-variable' warning: drivers/mtd/devices/pmc551.c: In function pmc551_erase: drivers/mtd/devices/pmc551.c:142:15: warning: variable soff_lo set but not used [-Wunused-but-set-variable] drivers/mtd/devices/pmc551.c: In function pmc551_read: drivers/mtd/devices/pmc551.c:232:15: warning: variable soff_lo set but not used [-Wunused-but-set-variable] drivers/mtd/devices/pmc551.c: In function pmc551_write: drivers/mtd/devices/pmc551.c:289:15: warning: variable soff_lo set but not used [-Wunused-but-set-variable] It is not used since commit cdf0a7d16980 ("[MTD] pmc551 whitespace cleanup") Reported-by: Hulk Robot <hulkci@huawei.com> Signed-off-by: zhengbin <zhengbin13@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: cfi_cmdset_0002: Fix do_erase_chip() to get chip as erasing modeTokunori Ikegami1-1/+1
The chip state is set to erasing by the function after getting chip. So it should be to get chip as erasing mode at first. But previously it was to get chip as writing mode then fix as erasing. Signed-off-by: Tokunori Ikegami <ikegami.t@gmail.com> Cc: linux-mtd@lists.infradead.org Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: sm_ftl: Fix memory leak in sm_init_zone() error pathWenwen Wang1-1/+4
In sm_init_zone(), 'zone->lba_to_phys_table' is allocated through kmalloc_array() and 'zone->free_sectors' is allocated in kfifo_alloc() respectively. However, they are not deallocated in the following execution if sm_read_sector() fails, leading to memory leaks. To fix this issue, free them before returning -EIO. Signed-off-by: Wenwen Wang <wenwen@cs.uga.edu> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: parsers: Move CMDLINE parserLinus Walleij5-38/+38
This moves the CMDLINE partition parser down into the parser subdirectory. No functional change. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: parsers: Move OF parserLinus Walleij5-10/+11
This moves the OF/device tree partition parser down into the parser subdirectory. No functional change. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: parsers: Move BCM63xx parserLinus Walleij5-10/+10
This moves the BCM63xx partition parser down into the parser subdirectory. No functional change. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: parsers: Move BCM47xx parserLinus Walleij5-8/+8
This moves the BCM47xx partition parser down into the parser subdirectory. No functional change. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: parsers: Move TI AR7 parserLinus Walleij5-6/+6
This moves the TI AR7 partition parser down into the parser subdirectory. No functional change. Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: pismo: Simplify getting the adapter of a clientWolfram Sang1-2/+1
We have a dedicated pointer for that, so use it. Much easier to read and less computation involved. Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: phram: Module parameters add writable permissionsXiaoming Ni1-1/+1
The phram code implements managing multiple devices through a linked list. However, due to the module parameter permission of 0, the /sys/module/phram/parameters/phram interface is missing. The command line arguments in insmod can only create one device. Therefore, add writable permissions to the module parameters, create /sys/module/phram/parameters/phram interface, and create multi-device support. Signed-off-by: Xiaoming Ni <nixiaoming@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15mtd: pxa2xx: Use ioremap_cache insted of ioremap_cachedChristoph Hellwig1-2/+1
pxa2xx-flash is the only user of ioremap_cached, which is an alias for ioremap_cache anyway. Signed-off-by: Christoph Hellwig <hch@lst.de> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15Merge tag 'cfi/for-5.4-rc1' of https://github.com/r-vignesh/linux into mtd/for-5.4Richard Weinberger2-113/+186
CFI core * Kill useless initializer in mtd_do_chip_probe() * Fix a rare write failure seen on some cfi_cmdset_0002 compliant Parallel NORs * Bunch of cleanups for cfi_cmdset_0002 driver's write functions by Tokunori Ikegami <ikegami.t@gmail.com>
2019-09-15Merge tag 'spi-nor/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/for-5.4Richard Weinberger11-827/+1358
MTD core changes: - add debugfs nodes for querying the flash name and id SPI NOR core changes: - always use bounce buffer for register read/writes - move m25p80 code in spi-nor.c - rework hwcaps selection for the spi-mem case - rework the core in order to move the manufacturer specific code out of it: - regroup flash parameters in 'struct spi_nor_flash_parameter' - add default_init() and post_sfdp() hooks to tweak the flash parameters - introduce the ->set_4byte(), ->convert_addr() and ->setup() methods, to deal with manufacturer specific code - rework the SPI NOR lock/unlock logic - fix an error code in spi_nor_read_raw() - fix a memory leak bug - enable the debugfs for the partname and partid - add support for few flashes SPI NOR controller drivers changes: - intel-spi: - Whitelist 4B read commands - Add support for Intel Tiger Lake SPI serial flash - aspeed-smc: Add of_node_put() - hisi-sfc: Add of_node_put() - cadence-quadspi: Fix QSPI RCU Schedule Stall
2019-09-15Merge tag 'nand/for-5.4' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux into mtd/for-5.4Richard Weinberger16-389/+645
NAND core * Fixing typos * Adding missing of_node_put() in various drivers Raw NAND controller drivers: * Macronix: new controller driver * Omap2: Fixing the number of bitflips returned * Brcmnand: Fix a pointer not iterating over all the page chunks * W90x900: Driver removed * Onenand: Fix a memory leak * Sharpsl: Missing include guard * STM32: Avoid warnings when building with W=1 * Ingenic: Fix a coccinelle warning * r852: Call a helper to simplify the code
2019-09-15ubi: block: Warn if volume size is not multiple of 512Richard Weinberger1-8/+35
If volume size is not a multiple of 512, ubi block cuts off the last bytes of an volume since the block layer works on 512 byte sectors. This can happen especially on NOR flash with minimal io size of 1. To avoid unpleasant surprises, print a warning. Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15ubi: ubi_wl_get_peb: Increase the number of attempts while getting PEBZhihao Cheng1-3/+3
Running stress test io_paral (A pressure ubi test in mtd-utils) on an UBI device with fewer PEBs (fastmap enabled) may cause ENOSPC errors and make UBI device read-only, but there are still free PEBs on the UBI device. This problem can be easily reproduced by performing the following steps on a 2-core machine: $ modprobe nandsim first_id_byte=0x20 second_id_byte=0x33 parts=80 $ modprobe ubi mtd="0,0" fm_autoconvert $ ./io_paral /dev/ubi0 We may see the following verbose: (output) [io_paral] update_volume():108: failed to write 380 bytes at offset 95920 of volume 2 [io_paral] update_volume():109: update: 97088 bytes [io_paral] write_thread():227: function pwrite() failed with error 28 (No space left on device) [io_paral] write_thread():229: cannot write 15872 bytes to offs 31744, wrote -1 (dmesg) ubi0 error: ubi_wl_get_peb [ubi]: Unable to get a free PEB from user WL pool ubi0 warning: ubi_eba_write_leb [ubi]: switch to read-only mode CPU: 0 PID: 2027 Comm: io_paral Not tainted 5.3.0-rc2-00001-g5986cd0 #9 ubi0 warning: try_write_vid_and_data [ubi]: failed to write VID header to LEB 2:5, PEB 18 Hardware name: QEMU Standard PC (i440FX + PIIX, 1996), BIOS rel-1.12.0 -0-ga698c8995f-prebuilt.qemu.org 04/01/2014 Call Trace: dump_stack+0x85/0xba ubi_eba_write_leb+0xa1e/0xa40 [ubi] vol_cdev_write+0x307/0x520 [ubi] vfs_write+0xfa/0x280 ksys_pwrite64+0xc5/0xe0 __x64_sys_pwrite64+0x22/0x30 do_syscall_64+0xbf/0x440 In function ubi_wl_get_peb, the operation of filling the pool (ubi_update_fastmap) with free PEBs and fetching a free PEB from the pool is not atomic. After thread A filling the pool with free PEB, free PEB may be taken away by thread B. When thread A checks the expression again, the condition is still unsatisfactory. At this time, there may still be free PEBs on UBI that can be filled into the pool. This patch increases the number of attempts to obtain PEB. An extreme case (No free PEBs left after creating test volumes) has been tested on different type of machines for 100 times. The biggest number of attempts are shown below: x86_64 arm64 2-core 4 4 4-core 8 4 8-core 4 4 Signed-off-by: Zhihao Cheng <chengzhihao1@huawei.com> Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-15ubi: Don't do anchor move within fastmap areaRichard Weinberger1-0/+6
To make sure that Fastmap can use a PEB within the first 64 PEBs, UBI moves blocks away from that area. It uses regular wear-leveling for that job. An anchor move can be triggered if no PEB is free in this area or because of anticipation. In the latter case it can happen that UBI decides to move a block but finds a free PEB within the same area. This case is in vain an increases only erase counters. Catch this case and cancel wear-leveling if this happens. Signed-off-by: Richard Weinberger <richard@nod.at>
2019-09-05mtd: Kill mount_mtd()David Howells1-189/+0
Kill mount_mtd() as it has now been replaced by vfs_get_mtd_super() in the new mount API and nothing now uses it. Signed-off-by: David Howells <dhowells@redhat.com> cc: David Woodhouse <dwmw2@infradead.org> cc: Brian Norris <computersforpeace@gmail.com> cc: Boris Brezillon <bbrezillon@kernel.org> cc: Marek Vasut <marek.vasut@gmail.com> cc: Richard Weinberger <richard@nod.at> cc: linux-mtd@lists.infradead.org Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2019-09-05mtd: Provide fs_context-aware mount_mtd() replacementDavid Howells2-2/+178
Provide a function, get_tree_mtd(), to replace mount_mtd(), using an fs_context struct to hold the parameters. Signed-off-by: David Howells <dhowells@redhat.com> cc: David Woodhouse <dwmw2@infradead.org> cc: Brian Norris <computersforpeace@gmail.com> cc: Boris Brezillon <bbrezillon@kernel.org> cc: Marek Vasut <marek.vasut@gmail.com> cc: Richard Weinberger <richard@nod.at> cc: linux-mtd@lists.infradead.org Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2019-09-05vfs: Add a single-or-reconfig keying to vfs_get_super()David Howells0-0/+0
Add an additional keying mode to vfs_get_super() to indicate that only a single superblock should exist in the system, and that, if it does, further mounts should invoke reconfiguration upon it. This allows mount_single() to be replaced. [Fix by Eric Biggers folded in] Signed-off-by: David Howells <dhowells@redhat.com> Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
2019-08-30mtd: spi-nor: Rename "n25q512a" to "mt25qu512a (n25q512a)"Ashish Kumar1-1/+4
n25q512a was rebranded to mt25qu512a after its spin off from STM. mt25qu512a is different only in terms of operating frequency, the JEDEC id is the same as in n25q512a. Dual reads are supported (0x3b, 0x3c), set the SPI_NOR_DUAL_READ flag. 4-byte opcodes are supported, set the SPI_NOR_4B_OPCODES flag. Tested Single I/O and QUAD I/O mode on LS1046FRWY. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Ashish Kumar <Ashish.Kumar@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> [tudor.ambarus@microchip.com: rename entry to "mt25qu512a (n25q512a)", reword commit message, order entry by size, drop comment as it looked redundant] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-30mtd: spi-nor: Add support for mt35xu02gAshish Kumar1-0/+3
mt35xu02g is an Octal flash supporting Single and OCTAL I/O. Tested on LS1028ARDB. Signed-off-by: Kuldeep Singh <kuldeep.singh@nxp.com> Signed-off-by: Ashish Kumar <ashish.kumar@nxp.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com> [tudor.ambarus@microchip.com: reword commit message] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-29mtd: hyperbus: fix dependency and build errorRandy Dunlap1-0/+1
lib/devres.c, which implements devm_ioremap_resource(), is only built when CONFIG_HAS_IOMEM is set/enabled, so MTD_HYPERBUS should depend on HAS_IOMEM. Fixes a build error and a Kconfig warning (as seen on UML builds): WARNING: unmet direct dependencies detected for MTD_COMPLEX_MAPPINGS Depends on [n]: MTD [=m] && HAS_IOMEM [=n] Selected by [m]: - MTD_HYPERBUS [=m] && MTD [=m] ERROR: "devm_ioremap_resource" [drivers/mtd/hyperbus/hyperbus-core.ko] undefined! Fixes: dcc7d3446a0f ("mtd: Add support for HyperBus memory devices") Signed-off-by: Randy Dunlap <rdunlap@infradead.org> Cc: Vignesh Raghavendra <vigneshr@ti.com> Cc: Miquel Raynal <miquel.raynal@bootlin.com> Cc: Geert Uytterhoeven <geert@linux-m68k.org> Cc: linux-mtd@lists.infradead.org Acked-by: Vignesh Raghavendra <vigneshr@ti.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-29mtd: rawnand: omap2: Fix number of bitflips reporting with ELMSascha Hauer1-1/+1
omap_elm_correct_data() returns the number of bitflips for the whole page. This is wrong, it should return the maximum number of bitflips found in each ECC step. In my case with a 4k page size NAND mtcdore reported -EUCLEAN with only 12 bitflips on a page where we could correct up to 128 bits per page (provided they are distributed equally on the 8 ECC steps) Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-29mtd: rawnand: brcmnand: Fix ecc chunk calculation for erased page bitfipsClaire Lin1-1/+4
In brcmstb_nand_verify_erased_page(), the ECC chunk pointer calculation while correcting erased page bitflips is wrong, fix it. Fixes: 02b88eea9f9c ("mtd: brcmnand: Add check for erased page bitflips") Signed-off-by: Claire Lin <claire.lin@broadcom.com> Reviewed-by: Ray Jui <ray.jui@broadcom.com> Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com> Signed-off-by: Miquel Raynal <miquel.raynal@bootlin.com>
2019-08-29mtd: spi-nor: remove superfluous pass of nor->info->sector_sizeTudor Ambarus1-2/+3
We already pass a pointer to nor, we can obtain the sector_size by dereferencing it. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-29mtd: spi-nor: enable the debugfs for the partname and partidZhuohao Lee1-0/+12
This patch adds spi_nor_debugfs_init() for the debugfs initialization. With this patch, we can read the partname and partid through the debugfs. The output of new debugfs nodes on my device are: cat /sys/kernel/debug/mtd/mtd0/partid spi-nor:ef6017 cat /sys/kernel/debug/mtd/mtd0/partname w25q64dw Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-29mtd: mtdcore: add debugfs nodes for querying the flash name and idZhuohao Lee1-9/+77
Currently, we don't have vfs nodes for querying the underlying flash name and flash id. This information is important especially when we want to know the flash detail of the defective system. In order to support the query, we add mtd_debugfs_populate() to create two debugfs nodes (ie. partname and partid). The upper driver can assign the pointer to partname and partid before calling mtd_device_register(). Signed-off-by: Zhuohao Lee <zhuohao@chromium.org> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-28mtd: spi-nor: hisi-sfc: Add of_node_put() before breakNishka Dasgupta1-0/+1
Each iteration of for_each_available_child_of_node puts the previous node, but in the case of a break from the middle of the loop, there is no put, thus causing a memory leak. Hence add an of_node_put before the break. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-28mtd: spi-nor: aspeed-smc: Add of_node_put()Nishka Dasgupta1-1/+3
Each iteration of for_each_available_child_of_node puts the previous node, but in the case of a break from the middle of the loop, there is no put, thus causing a memory leak. Upon termination of the loop (whether by break or a natural exit), either ret will have a non-zero value or child will be NULL. Hence add an of_node_put() that will execute only when ret has a non-zero value, as calling of_node_put() on a possible NULL value does not cause any further issues. Issue found with Coccinelle. Signed-off-by: Nishka Dasgupta <nishkadg.linux@gmail.com> Reviewed-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com>
2019-08-28mtd: spi-nor: Introduce spi_nor_get_flash_info()Tudor Ambarus1-32/+44
Dedicate a function for getting the pointer to the flash_info const struct. Trim a bit the spi_nor_scan() huge function. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Introduce spi_nor_set_addr_width()Tudor Ambarus1-20/+30
Parsing of flash parameters were interleaved with setting of the nor addr width. Dedicate a function for setting nor addr width. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Bring flash params init togetherTudor Ambarus1-18/+11
Bring all flash parameters default initialization in spi_nor_legacy_params_init(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add the SPI_NOR_XSR_RDY flagBoris Brezillon1-1/+9
S3AN flashes use a specific opcode to read the status register. We currently use the SPI_S3AN flag to decide whether this specific SR read opcode should be used, but SPI_S3AN is about to disappear, so let's add a new flag. Note that we use the same bit as SPI_S3AN implies SPI_NOR_XSR_RDY and vice versa. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add s3an_post_sfdp_fixups()Tudor Ambarus1-7/+11
s3an_nor_scan() was overriding the opcode selection done in spi_nor_default_setup(). Set nor->setup() method in order to avoid the unnecessary call to spi_nor_default_setup(). Now that the call to spi_nor_default_setup() is skipped, set mtd.erasesize to nor->info->sector_size, as it was when spi_nor_select_erase() was called. No dummy byte is required for the S3AN's Random Read command (0x03), so no need to set nor->read_dummy. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add a ->setup() methodTudor Ambarus1-211/+221
nor->params.setup() configures the SPI NOR memory. Useful for SPI NOR flashes that have peculiarities to the SPI NOR standard, e.g. different opcodes, specific address calculation, page size, etc. Right now the only user will be the S3AN chips, but other manufacturers can implement it if needed. Move spi_nor_setup() related code in order to avoid a forward declaration to spi_nor_default_setup(). Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add a ->convert_addr() methodBoris Brezillon1-10/+14
In order to separate manufacturer quirks from the core we need to get rid of all the manufacturer specific flags, like the SNOR_F_S3AN_ADDR_DEFAULT one. This can easily be replaced by a ->convert_addr() hook, which when implemented will provide the core with an easy way to convert an absolute address into something the flash understands. Right now the only user are the S3AN chips, but other manufacturers can implement it if needed. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add spansion_post_sfdp_fixups()Boris Brezillon1-14/+23
Add a spansion_post_sfdp_fixups() function to fix the erase opcode, erase sector size and set the SNOR_F_4B_OPCODES flag. This way, all spansion related quirks are placed in the spansion_post_sfdp_fixups() function. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Add post_sfdp() hook to tweak flash configBoris Brezillon1-1/+32
SFDP tables are sometimes wrong and we need a way to override the config chosen by the SFDP parsing logic without discarding all of it. Add a new hook called after the SFDP parsing has taken place to deal with such problems. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Rework the SPI NOR lock/unlock logicBoris Brezillon1-13/+37
Add the SNOR_F_HAS_LOCK flag and set it when SPI_NOR_HAS_LOCK is set in the flash_info entry or when it's a Micron or ST flash. Move the locking hooks in a separate struct so that we have just one field to update when we change the locking implementation. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [tudor.ambarus@microchip.com: use ->default_init() hook, introduce spi_nor_late_init_params(), set ops in nor->params] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Create a ->set_4byte() methodBoris Brezillon1-37/+39
The procedure used to enable 4 byte addressing mode depends on the NOR device, so let's provide a hook so that manufacturer specific handling can be implemented in a sane way. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> [tudor.ambarus@microchip.com: use nor->params.set_4byte() instead of nor->set_4byte()] Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Split spi_nor_init_params()Tudor Ambarus1-20/+63
Add functions to delimit what the chunks of code do: static void spi_nor_init_params() { spi_nor_info_init_params() spi_nor_manufacturer_init_params() spi_nor_sfdp_init_params() } Add descriptions to all methods. spi_nor_init_params() becomes of type void, as all its children return void. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
2019-08-28mtd: spi-nor: Move manufacturer quad_enable() in ->default_init()Tudor Ambarus1-19/+29
The goal is to move the quad_enable manufacturer specific init in the nor->manufacturer->fixups->default_init() The legacy quad_enable() implementation is spansion_quad_enable(), select this method by default. Set specific manufacturer fixups->default_init() hooks to overwrite the default quad_enable() implementation when needed. Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Reviewed-by: Boris Brezillon <boris.brezillon@collabora.com> Reviewed-by: Vignesh Raghavendra <vigneshr@ti.com>
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.