Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-06-20 | net: dsa: mv88e6xxx: add irl_init_all op | Vivien Didelot | 1 | -16/+3 |
2017-06-15 | net: dsa: mv88e6xxx: prefix Global VTU macros | Vivien Didelot | 1 | -2/+2 |
2017-06-09 | net: dsa: mv88e6xxx: rework jumbo size operation | Vivien Didelot | 1 | -1/+2 |
2017-06-09 | net: dsa: mv88e6xxx: rework pause limit operation | Vivien Didelot | 1 | -1/+2 |
2017-06-09 | net: dsa: mv88e6xxx: do not prefix ops with g1 | Vivien Didelot | 1 | -2/+2 |
2017-06-09 | net: dsa: mv88e6xxx: add egress mode enumeration | Vivien Didelot | 1 | -0/+7 |
2017-06-04 | net: dsa: mv88e6xxx: move the Global 2 macros | Vivien Didelot | 1 | -101/+0 |
2017-06-04 | net: dsa: mv88e6xxx: move the Global 1 macros | Vivien Didelot | 1 | -141/+0 |
2017-06-04 | net: dsa: mv88e6xxx: move the Port macros | Vivien Didelot | 1 | -160/+0 |
2017-06-04 | net: dsa: mv88e6xxx: move PHY macros | Vivien Didelot | 1 | -4/+0 |
2017-06-04 | net: dsa: mv88e6xxx: rename chip header | Vivien Didelot | 1 | -0/+928 |