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path: root/drivers/net/dsa/sja1105 (follow)
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2021-07-26net: dsa: sja1105: add bridge TX data plane offload based on tag_8021qVladimir Oltean1-0/+4
2021-07-26net: dsa: sja1105: add support for imprecise RXVladimir Oltean1-1/+7
2021-07-26net: dsa: sja1105: deny more than one VLAN-aware bridgeVladimir Oltean1-0/+13
2021-07-26net: dsa: sja1105: deny 8021q uppers on portsVladimir Oltean1-0/+15
2021-07-26net: dsa: sja1105: delete vlan delta save/restore logicVladimir Oltean2-300/+114
2021-07-26net: dsa: sja1105: remove redundant re-assignment of pointer tableColin Ian King1-2/+0
2021-07-23Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-0/+6
2021-07-21net: dsa: sja1105: make VID 4095 a bridge VLAN tooVladimir Oltean1-0/+6
2021-07-20net: dsa: tag_8021q: add proper cross-chip notifier supportVladimir Oltean1-126/+6
2021-07-20net: dsa: tag_8021q: absorb dsa_8021q_setup into dsa_tag_8021q_{,un}registerVladimir Oltean1-26/+6
2021-07-20net: dsa: make tag_8021q operations part of the coreVladimir Oltean1-7/+3
2021-07-20net: dsa: let the core manage the tag_8021q contextVladimir Oltean2-26/+15
2021-07-20net: dsa: tag_8021q: create dsa_tag_8021q_{register,unregister} helpersVladimir Oltean1-9/+9
2021-07-20net: dsa: sja1105: delete the best_effort_vlan_filtering modeVladimir Oltean4-600/+23
2021-07-13net: dsa: sja1105: fix address learning getting disabled on the CPU portVladimir Oltean1-8/+6
2021-06-29Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski1-0/+6
2021-06-28net: dsa: sja1105: fix dynamic access to L2 Address Lookup table for SJA1110Vladimir Oltean1-4/+22
2021-06-24net: dsa: sja1105: fix NULL pointer dereference in sja1105_reload_cbs()Vladimir Oltean1-0/+6
2021-06-24net: dsa: sja1105: document the SJA1110 in the KconfigVladimir Oltean1-2/+6
2021-06-18net: dsa: sja1105: completely error out in sja1105_static_config_reload if something failsVladimir Oltean1-7/+12
2021-06-18net: dsa: sja1105: allow the TTEthernet configuration in the static config for SJA1110Vladimir Oltean1-2/+1
2021-06-18net: dsa: sja1105: properly power down the microcontroller clock for SJA1110Vladimir Oltean4-16/+53
2021-06-14net: dsa: sja1105: constify the sja1105_regs structuresVladimir Oltean1-3/+3
2021-06-11net: dsa: sja1105: plug in support for 2500base-xVladimir Oltean3-2/+16
2021-06-11net: dsa: sja1105: SGMII and 2500base-x on the SJA1110 are 'special'Vladimir Oltean1-0/+2
2021-06-11net: dsa: sja1105: register the PCS MDIO bus for SJA1110Vladimir Oltean3-0/+109
2021-06-11net: dsa: sja1105: migrate to xpcs for SGMIIVladimir Oltean6-199/+195
2021-06-11net: dsa: sja1105: implement TX timestamping for SJA1110Vladimir Oltean4-0/+81
2021-06-11net: dsa: sja1105: add the RX timestamping procedure for SJA1110Vladimir Oltean4-3/+40
2021-06-11net: dsa: add support for the SJA1110 native tagging protocolVladimir Oltean5-1/+18
2021-06-11net: dsa: sja1105: make SJA1105_SKB_CB fit a full timestampVladimir Oltean1-1/+1
2021-06-11net: dsa: sja1105: allow RX timestamps to be taken on all ports for SJA1110Vladimir Oltean3-10/+22
2021-06-11net: dsa: sja1105: enable the TTEthernet engine on SJA1110Vladimir Oltean1-0/+2
2021-06-09net: dsa: sja1105: Fix assigned yet unused return code rcColin Ian King1-1/+1
2021-06-08net: dsa: sja1105: register the MDIO buses for 100base-T1 and 100base-TXVladimir Oltean5-1/+358
2021-06-08net: dsa: sja1105: make sure the retagging port is enabled for SJA1110Vladimir Oltean3-0/+58
2021-06-08net: dsa: sja1105: add support for the SJA1110 switch familyVladimir Oltean8-12/+1312
2021-06-07net: dsa: sja1105: determine PHY/MAC role from PHY interface typeVladimir Oltean1-46/+18
2021-06-07net: dsa: sja1105: apply RGMII delays based on the fixed-link propertyVladimir Oltean2-14/+15
2021-05-31net: dsa: sja1105: some table entries are always present when read dynamicallyVladimir Oltean1-7/+8
2021-05-31net: dsa: sja1105: always keep RGMII ports in the MAC roleVladimir Oltean2-7/+8
2021-05-31net: dsa: sja1105: add a translation table for port speedsVladimir Oltean4-35/+84
2021-05-31net: dsa: sja1105: add a PHY interface type compatibility matrixVladimir Oltean3-29/+55
2021-05-31net: dsa: sja1105: cache the phy-mode port propertyVladimir Oltean2-21/+4
2021-05-31net: dsa: sja1105: the 0x1F0000 SGMII "base address" is actually MDIO_MMD_VEND2Vladimir Oltean3-17/+16
2021-05-31net: dsa: sja1105: allow SGMII PCS configuration to be per portVladimir Oltean1-31/+44
2021-05-31net: dsa: sja1105: be compatible with "ethernet-ports" OF node nameVladimir Oltean1-0/+2
2021-05-27Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netJakub Kicinski2-27/+70
2021-05-24net: dsa: sja1105: allow the frame buffer size to be customizedVladimir Oltean5-22/+27
2021-05-24net: dsa: sja1105: configure the multicast policers, if presentVladimir Oltean1-0/+4
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