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2022-08-09net: atlantic: fix aq_vec index out of range errorChia-Lin Kao (AceLan)1-13/+8
The final update statement of the for loop exceeds the array range, the dereference of self->aq_vec[i] is not checked and then leads to the index out of range error. Also fixed this kind of coding style in other for loop. [ 97.937604] UBSAN: array-index-out-of-bounds in drivers/net/ethernet/aquantia/atlantic/aq_nic.c:1404:48 [ 97.937607] index 8 is out of range for type 'aq_vec_s *[8]' [ 97.937608] CPU: 38 PID: 3767 Comm: kworker/u256:18 Not tainted 5.19.0+ #2 [ 97.937610] Hardware name: Dell Inc. Precision 7865 Tower/, BIOS 1.0.0 06/12/2022 [ 97.937611] Workqueue: events_unbound async_run_entry_fn [ 97.937616] Call Trace: [ 97.937617] <TASK> [ 97.937619] dump_stack_lvl+0x49/0x63 [ 97.937624] dump_stack+0x10/0x16 [ 97.937626] ubsan_epilogue+0x9/0x3f [ 97.937627] __ubsan_handle_out_of_bounds.cold+0x44/0x49 [ 97.937629] ? __scm_send+0x348/0x440 [ 97.937632] ? aq_vec_stop+0x72/0x80 [atlantic] [ 97.937639] aq_nic_stop+0x1b6/0x1c0 [atlantic] [ 97.937644] aq_suspend_common+0x88/0x90 [atlantic] [ 97.937648] aq_pm_suspend_poweroff+0xe/0x20 [atlantic] [ 97.937653] pci_pm_suspend+0x7e/0x1a0 [ 97.937655] ? pci_pm_suspend_noirq+0x2b0/0x2b0 [ 97.937657] dpm_run_callback+0x54/0x190 [ 97.937660] __device_suspend+0x14c/0x4d0 [ 97.937661] async_suspend+0x23/0x70 [ 97.937663] async_run_entry_fn+0x33/0x120 [ 97.937664] process_one_work+0x21f/0x3f0 [ 97.937666] worker_thread+0x4a/0x3c0 [ 97.937668] ? process_one_work+0x3f0/0x3f0 [ 97.937669] kthread+0xf0/0x120 [ 97.937671] ? kthread_complete_and_exit+0x20/0x20 [ 97.937672] ret_from_fork+0x22/0x30 [ 97.937676] </TASK> v2. fixed "warning: variable 'aq_vec' set but not used" v3. simplified a for loop Fixes: 97bde5c4f909 ("net: ethernet: aquantia: Support for NIC-specific code") Signed-off-by: Chia-Lin Kao (AceLan) <acelan.kao@canonical.com> Acked-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Link: https://lore.kernel.org/r/20220808081845.42005-1-acelan.kao@canonical.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2022-04-20net: atlantic: Implement xdp data planeTaehee Yoo1-0/+136
It supports XDP_PASS, XDP_DROP and multi buffer. The new function aq_nic_xmit_xdpf() is used to send packet with xdp_frame and internally it calls aq_nic_map_xdp(). AQC chip supports 32 multi-queues and 8 vectors(irq). there are two option 1. under 8 cores and 4 tx queues per core. 2. under 4 cores and 8 tx queues per core. Like ixgbe, these tx queues can be used only for XDP_TX, XDP_REDIRECT queue. If so, no tx_lock is needed. But this patchset doesn't use this strategy because getting hardware tx queue index cost is too high. So, tx_lock is used in the aq_nic_xmit_xdpf(). single-core, single queue, 80% cpu utilization. 30.75% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 10.35% [kernel] [k] aq_hw_read_reg <---------- here 4.38% [kernel] [k] get_page_from_freelist single-core, 8 queues, 100% cpu utilization, half PPS. 45.56% [kernel] [k] aq_hw_read_reg <---------- here 17.58% bpf_prog_xxx_xdp_prog_tx [k] bpf_prog_xxx_xdp_prog_tx 4.72% [kernel] [k] hw_atl_b0_hw_ring_rx_receive The new function __aq_ring_xdp_clean() is a xdp rx handler and this is called only when XDP is attached. Signed-off-by: Taehee Yoo <ap420073@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2022-04-08net: atlantic: Avoid out-of-bounds indexingKai-Heng Feng1-4/+4
UBSAN warnings are observed on atlantic driver: [ 294.432996] UBSAN: array-index-out-of-bounds in /build/linux-Qow4fL/linux-5.15.0/drivers/net/ethernet/aquantia/atlantic/aq_nic.c:484:48 [ 294.433695] index 8 is out of range for type 'aq_vec_s *[8]' The ring is dereferenced right before breaking out the loop, to prevent that from happening, only use the index in the loop to fix the issue. BugLink: https://bugs.launchpad.net/bugs/1958770 Tested-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Kai-Heng Feng <kai.heng.feng@canonical.com> Reviewed-by: Igor Russkikh <irusskikh@marvell.com> Link: https://lore.kernel.org/r/20220408022204.16815-1-kai.heng.feng@canonical.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2021-12-02ethernet: aquantia: Try MAC address from device treeTianhao Chai1-10/+14
Apple M1 Mac minis (2020) with 10GE NICs do not have MAC address in the card, but instead need to obtain MAC addresses from the device tree. In this case the hardware will report an invalid MAC. Currently atlantic driver does not query the DT for MAC address and will randomly assign a MAC if the NIC doesn't have a permanent MAC burnt in. This patch causes the driver to perfer a valid MAC address from OF (if present) over HW self-reported MAC and only fall back to a random MAC address when neither of them is valid. Signed-off-by: Tianhao Chai <cth451@gmail.com> Reviewed-by: Igor Russkikh <irusskikh@marvell.com> Reviewed-by: Hector Martin <marcan@marcan.st> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-11-29atlantic: Fix statistics logic for production hardwareDmitry Bogdanov1-2/+8
B0 is the main and widespread device revision of atlantic2 HW. In the current state, driver will incorrectly fetch the statistics for this revision. Fixes: 5cfd54d7dc186 ("net: atlantic: minimal A2 fw_ops") Signed-off-by: Dmitry Bogdanov <dbezrukov@marvell.com> Signed-off-by: Sudarsana Reddy Kalluru <skalluru@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-16ethernet: aquantia: use eth_hw_addr_set()Jakub Kicinski1-2/+4
Commit 406f42fa0d3c ("net-next: When a bond have a massive amount of VLANs...") introduced a rbtree for faster Ethernet address look up. To maintain netdev->dev_addr in this tree we need to make all the writes to it got through appropriate helpers. Use an array on the stack, then call eth_hw_addr_set(). eth_hw_addr_set() is after error checking, this should be fine, error propagates all the way to failing probe. Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2021-10-02ethernet: use eth_hw_addr_set() instead of ether_addr_copy()Jakub Kicinski1-1/+1
Convert Ethernet from ether_addr_copy() to eth_hw_addr_set(): @@ expression dev, np; @@ - ether_addr_copy(dev->dev_addr, np) + eth_hw_addr_set(dev, np) Signed-off-by: Jakub Kicinski <kuba@kernel.org> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-11-10net: atlantic: Remove unnecessary conversion to boolKaixu Xia1-1/+1
The '!=' expression itself is bool, no need to convert it to bool. Fix the following coccicheck warning: ./drivers/net/ethernet/aquantia/atlantic/aq_nic.c:1477:34-39: WARNING: conversion to bool not needed here Reported-by: Tosk Robot <tencent_os_robot@tencent.com> Signed-off-by: Kaixu Xia <kaixuxia@tencent.com> Link: https://lore.kernel.org/r/1604797919-10157-1-git-send-email-kaixuxia@tencent.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-20net: remove unneeded breakTom Rix1-1/+0
A break is not needed if it is preceded by a return or goto Signed-off-by: Tom Rix <trix@redhat.com> Link: https://lore.kernel.org/r/20201019172607.31622-1-trix@redhat.com Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-10-06net: atlantic: implement media detect feature via phy tunablesIgor Russkikh1-0/+27
Mediadetect is another name for the EDPD (energy detect power down). This feature allows device to save extra power when no link is available. PHY goes into the extreme power saving mode and only periodically wakes up and checks for the link. AQC devices has fixed check period of 6 seconds The feature may increase linkup time. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-10-06net: atlantic: implement phy downshift featureIgor Russkikh1-0/+23
PHY downshift allows phy to try renegotiate if link is unstable and can carry higher speed. AQC devices has integrated PHY which is controlled by MAC firmware. Thus, driver defines new ethtool callbacks to implement phy tunables via netdev. Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-25Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/netDavid S. Miller1-0/+9
The UDP reuseport conflict was a little bit tricky. The net-next code, via bpf-next, extracted the reuseport handling into a helper so that the BPF sk lookup code could invoke it. At the same time, the logic for reuseport handling of unconnected sockets changed via commit efc6b6f6c3113e8b203b9debfb72d81e0f3dcace which changed the logic to carry on the reuseport result into the rest of the lookup loop if we do not return immediately. This requires moving the reuseport_has_conns() logic into the callers. While we are here, get rid of inline directives as they do not belong in foo.c files. The other changes were cases of more straightforward overlapping modifications. Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: atlantic: enable ipv6 support for TCP LSO and UDP GSOIgor Russkikh1-1/+1
This patch enables ipv6 support for TCP LSO and UDP GSO. The code itself (aq_nic_map_skb) was ready for this after udp gso feature, but corresponding NETIF_F_TSO6 wasn't enabled. We now have tested both tcp and udp v6 GSO, and enabling them safely. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-20net: atlantic: make _get_sw_stats return count as return valueMark Starovoytov1-2/+2
This patch changes aq_vec_get_sw_stats() to return count as a return value (which was unused) instead of an out parameter. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-07-17net: atlantic: disable PTP on AQC111, AQC112Nikita Danilov1-0/+9
This patch disables PTP on AQC111 and AQC112 due to a known HW issue, which can cause datapath issues. Ideally PTP block should have been disabled via PHY provisioning, but unfortunately many units have been shipped with enabled PTP block. Thus, we have to work around this in the driver. Fixes: dbcd6806af420 ("net: aquantia: add support for Phy access") Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-26net: atlantic: Replace ENOTSUPP usage to EOPNOTSUPPMark Starovoytov1-1/+1
This patch replaces ENOTSUPP (where it was used by mistake) with EOPNOTSUPP. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-22net: atlantic: A2: report link partner capabilitiesDmitry Bogdanov1-0/+49
This patch adds link partner capabilities reporting support on A2. In particular, the following capabilities are available for reporting: * link rate; * EEE; * flow control. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-06-22net: atlantic: A2: half duplex supportIgor Russkikh1-14/+46
This patch adds support for 10M/100M/1G half duplex rates, which are supported by A2 in additional to full duplex rates supported by A1. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: QoS implementation: min_rateMark Starovoytov1-0/+28
This patch adds support for mqprio min_rate limiters. A2 HW supports Weighted Strict Priority (WSP) arbitration for Tx Descriptor Queue scheduling among TCs, which can be used for min_rate shaping. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: automatically downgrade the number of queues if necessaryMark Starovoytov1-24/+54
This patch adds support for automatic queue number downgrade. On A2: this is a must have, because only TC0/TC1 support more than 4Q. Other TCs support 4Qs maximum. Thus, on A2 we must downgrade the number of queues per TC to 4, if more than 2 TCs are requested. On A1: this allows using 8TCs even on systems with cpu count >= 8, when we have 8 queues by default. We will just automatically switch to 8TCx4Q mode in this case. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: QoS implementation: max_rateMark Starovoytov1-0/+20
This patch adds initial support for mqprio rate limiters (max_rate only). Atlantic HW supports Rate-Shaping for time-sensitive traffic at per Traffic Class (TC) granularity. Target rate is defined by: * nominal link rate (always 10G); * rate factor (ratio between nominal rate and max allowed). Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: make TCVEC2RING accept nic_cfgMark Starovoytov1-4/+5
This patch updates TCVEC2RING to accept nic_cfg, which is needed to be able to use it from hw_atl. The name is updated to reflect the changes. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: per-TC queue statisticsMark Starovoytov1-4/+8
This patch adds support for per-TC queue statistics. By default (single TC), the output is the same as it used to be, e.g.: Queue[0] InPackets: 2 Queue[0] OutPackets: 8 Queue[0] Restarts: 0 Queue[0] InJumboPackets: 0 Queue[0] InLroPackets: 0 Queue[0] InErrors: 0 If several TCs are enabled, then each queue statistics line is prefixed with TC number, e.g.: TC0 Queue[0] InPackets: 6 TC0 Queue[0] OutPackets: 11 Queue numbering is end-to-end, so: TC1 Queue[4] InPackets: 0 TC1 Queue[4] OutPackets: 22 Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: QoS implementation: multi-TC supportDmitry Bezrukov1-4/+57
This patch adds multi-TC support. PTP is automatically disabled when the user enables more than 2 TCs, otherwise traffic on TC2 won't quite work, because it's reserved for PTP. Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: changes for multi-TC supportDmitry Bezrukov1-9/+17
This patch contains the following changes: * add cfg->is_ptp (used for PTP enable/disable switch, which is described in more details below); * add cfg->tc_mode (A1 supports 2 HW modes only); * setup queue to TC mapping based on TC mode on A2; * remove hw_tx_tc_mode_get / hw_rx_tc_mode_get hw_ops. In the first generation of our hardware (A1), a whole traffic class is consumed for PTP handling in FW (FW uses it to send the ptp data and to send back timestamps). The 'is_ptp' flag introduced in this patch will be used in to automatically disable PTP when a conflicting configuration is detected, e.g. when multiple TCs are enabled. Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-22net: atlantic: changes for multi-TC supportDmitry Bezrukov1-15/+28
This patch contains the following changes: * access cfg via aq_nic_get_cfg() in aq_nic_start() and aq_nic_map_skb(); * call aq_nic_get_dev() just once in aq_nic_map_skb(); * move ring allocation/deallocation out of aq_vec_alloc()/aq_vec_free(); * add the missing aq_nic_deinit() in atl_resume_common(); * rename 'tcs' field to 'tcs_max' in aq_hw_caps_s to differentiate it from the 'tcs' field in aq_nic_cfg_s, which is used for the current number of TCs; * update _TC_MAX defines to the actual number of supported TCs; * move tx_tc_mode register defines slightly higher (just to keep the order of definitions); * separate variables for TX/RX buff_size in hw_atl*_hw_qos_set(); * use AQ_HW_*_TC instead of hardcoded magic numbers; * actually use the 'ret' value in aq_mdo_add_secy(); Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Co-developed-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-09net: atlantic: unify MAC generationMark Starovoytov1-0/+14
This patch unifies invalid MAC address handling with other drivers. Basically we've switched to using standard APIs (is_valid_ether_addr / eth_hw_addr_random) where possible. It's worth noting that some of engineering Aquantia NICs might be provisioned with a partially zeroed out MAC, which is still invalid, but not caught by is_valid_ether_addr(), so we've added a special handling for this case. Also adding a warning in case of fallback to random MAC, because this shouldn't be needed on production NICs, they should all be provisioned with unique MAC. NB! Default systemd/udevd configuration is 'MACAddressPolicy=persistent'. This causes MAC address to be persisted across driver reloads and reboots. We had to change it to 'none' for verification purposes. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-05-09net: atlantic: rename AQ_NIC_RATE_2GS to AQ_NIC_RATE_2G5Mark Starovoytov1-6/+7
This patch changes the constant name to a more logical "2G5" (for 2.5G speeds). Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2020-05-01net: atlantic: basic A2 init/deinit hw_opsIgor Russkikh1-1/+2
This patch adds basic A2 HW initialization / deinitialization. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Co-developed-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: make hw_get_regs optionalMark Starovoytov1-0/+6
This patch fixes potential crash in case if hw_get_regs is NULL. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: simplify hw_get_fw_version() usageNikita Danilov1-5/+1
hw_get_fw_version() never fails, so this patch simplifies its usage by utilizing return value instead of output argument. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: add hw_soft_reset, hw_prepare to hw_opsMark Starovoytov1-1/+15
A2 will have a different implementation of these 2 APIs, so this patch moves them to hw_ops in preparation for A2. Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Co-developed-by: Dmitry Bezrukov <dbezrukov@marvell.com> Signed-off-by: Dmitry Bezrukov <dbezrukov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-05-01net: atlantic: add defines for 10M and EEE 100M link modeIgor Russkikh1-0/+12
This patch adds defines for 10M and EEE 100M link modes, which are supported by A2. 10M support is added in this patch series. EEE is out of scope, but will be added in a follow-up series. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec offload statistics implementationDmitry Bogdanov1-1/+4
This patch adds support for MACSec statistics on Atlantic network cards. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-03-26net: atlantic: MACSec offload skeletonDmitry Bogdanov1-0/+16
This patch adds basic functionality for MACSec offloading for Atlantic NICs. MACSec offloading functionality is enabled if network card has appropriate FW that has MACSec offloading enabled in config. Actual functionality (ingress, egress, etc) will be added in follow-up patches. Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: Mark Starovoytov <mstarovoitov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-16net: atlantic: fix potential error handlingPavel Belous1-1/+3
Code inspection found that in case of mapping error we do return current 'ret' value. But beside error, it is used to count number of descriptors allocated for the packet. In that case map_skb function could return '1'. Changing it to return zero (number of mapped descriptors for skb) Fixes: 018423e90bee ("net: ethernet: aquantia: Add ring support code") Signed-off-by: Pavel Belous <pbelous@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-02-16net: atlantic: fix use after free kasan warnPavel Belous1-4/+0
skb->len is used to calculate statistics after xmit invocation. Under a stress load it may happen that skb will be xmited, rx interrupt will come and skb will be freed, all before xmit function is even returned. Eventually, skb->len will access unallocated area. Moving stats calculation into tx_clean routine. Fixes: 018423e90bee ("net: ethernet: aquantia: Add ring support code") Reported-by: Christophe Vu-Brugier <cvubrugier@fastmail.fm> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: Pavel Belous <pbelous@marvell.com> Signed-off-by: Dmitry Bogdanov <dbogdanov@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2020-01-06net: atlantic: loopback configuration in improper placeIgor Russkikh1-2/+2
Initial loopback configuration should be called earlier, before starting traffic on HW blocks. Otherwise depending on race conditions it could be kept disabled. Fixes: ea4b4d7fc106 ("net: atlantic: loopback tests via private flags") Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: implement UDP GSO offloadIgor Russkikh1-24/+28
atlantic hardware does support UDP hardware segmentation offload. This allows user to specify one large contiguous buffer with data which then will be split automagically into multiple UDP packets of specified size. Bulk sending of large UDP streams lowers CPU usage and increases bandwidth. We did estimations both with udpgso_bench_tx test tool and with modified iperf3 measurement tool (4 streams, multithread, 200b packet size) over AQC<->AQC 10G link. Flow control is disabled to prevent RX side impact on measurements. No UDP GSO: iperf3 -c 10.0.1.2 -u -b0 -l 200 -P4 --multithread UDP GSO: iperf3 -c 10.0.1.2 -u -b0 -l 12600 --udp-lso 200 -P4 --multithread Mode CPU iperf speed Line speed Packets per second ------------------------------------------------------------- NO UDP GSO 350% 3.07 Gbps 3.8 Gbps 1,919,419 SW UDP GSO 200% 5.55 Gbps 6.4 Gbps 3,286,144 HW UDP GSO 90% 6.80 Gbps 8.4 Gbps 4,273,117 Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: update flow control logicNikita Danilov1-7/+12
We now differentiate requested and negotiated flow control modes. Therefore `ethtool -A` now operates on local requested FC values, and regular link settings shows the negotiated FC settings. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: code style cleanupNikita Danilov1-16/+23
Thats a pure checkpatck walkthrough the code with no functional changes. Reverse christmas tree, spacing, etc. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: loopback tests via private flagsIgor Russkikh1-0/+45
Here we add a number of ethtool private flags to allow enabling various loopbacks on HW. Thats useful for verification and bringup works. Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: add msglevel configurationNikita Danilov1-3/+4
We add ethtool msglevel configuration and change some printouts to use netdev_info set of functions. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: refactoring pm logicNikita Danilov1-38/+0
We now implement .driver.pm callbacks, these allows driver to work correctly in hibernate usecases, especially when used in conjunction with WOL feature. Before that driver only reacted to legacy .suspend/.resume callbacks, that was a limitation in some cases. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-11-07net: atlantic: implement wake_phy featureNikita Danilov1-15/+19
Wake on PHY allows to configure device to wakeup host as soon as PHY link status is changed to active. Signed-off-by: Nikita Danilov <ndanilov@marvell.com> Signed-off-by: Igor Russkikh <irusskikh@marvell.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-24net: aquantia: add support for PIN funcsDmitry Bezrukov1-0/+1
Depending on FW configuration we can manage from 0 to 3 PINs for periodic output and from 0 to 1 ext ts PIN for getting TS for external event. Ext TS PIN functionality is implemented via periodic timestamps polling directly from PHY, because right now there is now way to receive the PIN trigger interrupt from phy. The polling interval is 15 milliseconds. Co-developed-by: Egor Pomozov <epomozov@marvell.com> Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Pavel Belous <pavel.belous@aquantia.com> Signed-off-by: Pavel Belous <pavel.belous@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-24net: aquantia: add support for Phy accessDmitry Bezrukov1-0/+6
GPIO PIN control and access is done by direct phy manipulation. Here we add an aq_phy module which is able to access phy registers via MDIO access mailbox. Access is controlled via HW semaphore. Co-developed-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Nikita Danilov <nikita.danilov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Reviewed-by: Andrew Lunn <andrew@lunn.ch> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-24net: aquantia: rx filters for ptpDmitry Bezrukov1-0/+44
We implement HW filter reservation for PTP traffic. Special location in filters table is marked as reserved, because incoming ptp traffic should be directed only to PTP designated queue. This way HW will do PTP timestamping and proper processing. Co-developed-by: Egor Pomozov <epomozov@marvell.com> Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-24net: aquantia: implement data PTP datapathEgor Pomozov1-4/+14
Here we do alloc/free IRQs for PTP rings. We also implement processing of PTP packets on TX and RX sides. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
2019-10-24net: aquantia: add PTP rings infrastructureEgor Pomozov1-0/+16
Add implementations of PTP rings alloc/free. PTP desing on this device uses two separate rings on a separate traffic class for traffic rx/tx. Third ring (hwts) is not a traffic ring, but is used only to receive timestamps of the transmitted packets. Signed-off-by: Egor Pomozov <epomozov@marvell.com> Co-developed-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Signed-off-by: Sergey Samoilenko <sergey.samoilenko@aquantia.com> Co-developed-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Dmitry Bezrukov <dmitry.bezrukov@aquantia.com> Signed-off-by: Igor Russkikh <igor.russkikh@aquantia.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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