| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-01-18 | Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel |   Linus Walleij | 6 | -17/+4531 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add TPU pins, groups and functions |   Ulrich Hecht | 1 | -0/+44 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add TMU pins, groups and functions | Ulrich Hecht | 1 | -0/+65 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add QSPI pins, groups, and functions | Ulrich Hecht | 1 | -0/+72 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add PWM pins, groups and functions | Ulrich Hecht | 1 | -0/+77 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add MSIOF pins, groups and functions | Ulrich Hecht | 1 | -0/+362 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions | Ulrich Hecht | 1 | -0/+79 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function | Ulrich Hecht | 1 | -0/+62 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions | Ulrich Hecht | 1 | -0/+134 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add DU pins, groups and function | Ulrich Hecht | 1 | -0/+54 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functions | Ulrich Hecht | 1 | -0/+137 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functions | Ulrich Hecht | 1 | -0/+595 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add I2C pins, groups and functions | Ulrich Hecht | 1 | -0/+107 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functions | Ulrich Hecht | 1 | -0/+156 |
| 2021-01-14 | pinctrl: renesas: Initial R8A779A0 (V3U) PFC support | Ulrich Hecht | 5 | -0/+2529 |
| 2021-01-14 | pinctrl: renesas: Add PORT_GP_CFG_{2,31} macros | Ulrich Hecht | 1 | -4/+12 |
| 2021-01-14 | pinctrl: renesas: Add I/O voltage level flag | Ulrich Hecht | 2 | -2/+23 |
| 2021-01-14 | pinctrl: renesas: Implement unlock register masks | Ulrich Hecht | 2 | -11/+19 |
| 2021-01-12 | pinctrl: renesas: checker: Restrict checks to Renesas platforms |   Geert Uytterhoeven | 1 | -0/+4 |
| 2021-01-05 | pinctrl: remove empty lines in pinctrl subsystem |   Zhaoyu Liu | 4 | -4/+0 |
| 2020-11-23 | pinctrl: renesas: Fix fall-through warnings for Clang |   Gustavo A. R. Silva | 1 | -0/+1 |
| 2020-11-23 | pinctrl: renesas: r8a77965: Add QSPI[01] pins, groups and functions |   Lad Prabhakar | 1 | -2/+73 |
| 2020-11-23 | pinctrl: renesas: r8a7796: Add QSPI[01] pins, groups and functions | Lad Prabhakar | 1 | -2/+73 |
| 2020-11-23 | pinctrl: renesas: r8a77951: Add QSPI[01] pins, groups and functions | Lad Prabhakar | 1 | -2/+73 |
| 2020-11-23 | pinctrl: renesas: r8a77990: Add QSPI[01] pins, groups and functions | Lad Prabhakar | 1 | -2/+73 |
| 2020-11-13 | pinctrl: renesas: Constify sh73a0_vccq_mc0_ops |   Rikard Falkeborn | 1 | -1/+1 |
| 2020-11-13 | pinctrl: renesas: Protect GPIO leftovers by CONFIG_PINCTRL_SH_FUNC_GPIO | Geert Uytterhoeven | 3 | -3/+11 |
| 2020-11-13 | pinctrl: renesas: r8a7778: Use common R-Car bias handling | Geert Uytterhoeven | 2 | -40/+10 |
| 2020-11-13 | pinctrl: renesas: r8a7778: Use physical addresses for PUPR regs | Geert Uytterhoeven | 1 | -15/+9 |
| 2020-11-13 | pinctrl: renesas: Factor out common R-Car Gen3 bias handling | Geert Uytterhoeven | 7 | -215/+54 |
| 2020-11-13 | pinctrl: renesas: Optimize sh_pfc_pin_config | Geert Uytterhoeven | 1 | -6/+4 |
| 2020-11-13 | pinctrl: renesas: Reorder struct sh_pfc_pin to remove hole | Geert Uytterhoeven | 1 | -2/+2 |
| 2020-11-13 | pinctrl: renesas: Singular/plural grammar fixes | Geert Uytterhoeven | 2 | -4/+4 |
| 2020-11-13 | pinctrl: renesas: Remove superfluous goto in sh_pfc_gpio_set_direction() | Geert Uytterhoeven | 1 | -5/+0 |
| 2020-11-13 | pinctrl: renesas: r8a7791: Optimize pinctrl image size for R8A774[34] |   Biju Das | 1 | -0/+18 |
| 2020-11-13 | pinctrl: renesas: r8a7790: Optimize pinctrl image size for R8A7742 | Biju Das | 1 | -0/+14 |
| 2020-11-13 | pinctrl: renesas: r8a77990: Optimize pinctrl image size for R8A774C0 | Biju Das | 1 | -0/+12 |
| 2020-11-13 | pinctrl: renesas: r8a77965: Optimize pinctrl image size for R8A774B1 | Biju Das | 1 | -0/+12 |
| 2020-11-13 | pinctrl: renesas: r8a7796: Optimize pinctrl image size for R8A774A1 | Biju Das | 1 | -0/+12 |
| 2020-11-13 | pinctrl: renesas: r8a77951: Optimize pinctrl image size for R8A774E1 | Biju Das | 1 | -2/+12 |
| 2020-10-26 | pinctrl: renesas: r8a7790: Add VIN1-B and VIN2-G pins, groups and functions | Lad Prabhakar | 1 | -1/+131 |
| 2020-09-15 | pinctrl: renesas: Reintroduce SH_PFC for common sh-pfc code | Geert Uytterhoeven | 2 | -10/+42 |
| 2020-09-15 | pinctrl: Rename sh-pfc to renesas | Geert Uytterhoeven | 41 | -0/+110424 |
