| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2021-10-15 | pinctrl: renesas: checker: Fix bias checks on SoCs with pull-down only pins |   Geert Uytterhoeven | 1 | -3/+5 |
| 2021-10-15 | pinctrl: renesas: checker: Move overlapping field check | Geert Uytterhoeven | 1 | -21/+34 |
| 2021-10-15 | pinctrl: renesas: checker: Fix off-by-one bug in drive register check | Geert Uytterhoeven | 1 | -1/+1 |
| 2021-10-15 | pinctrl: renesas: Fix save/restore on SoCs with pull-down only pins | Geert Uytterhoeven | 1 | -2/+4 |
| 2021-10-15 | pinctrl: renesas: r8a779[56]x: Add MediaLB pins |   Andrey Gusakov | 4 | -6/+74 |
| 2021-09-24 | pinctrl: renesas: rzg2l: Fix missing port register 21h |   Biju Das | 1 | -1/+1 |
| 2021-09-13 | pinctrl: renesas: No need to initialise global statics |   Jason Wang | 1 | -6/+6 |
| 2021-08-13 | pinctrl: renesas: Add RZ/G2L pin and gpio controller driver |   Lad Prabhakar | 3 | -0/+1187 |
| 2021-07-27 | pinctrl: renesas: Fix pin control matching on R-Car H3e-2G | Geert Uytterhoeven | 2 | -19/+14 |
| 2021-07-13 | pinctrl: renesas: r8a77995: Add bias pinconf support | Geert Uytterhoeven | 3 | -9/+316 |
| 2021-07-13 | pinctrl: renesas: rcar: Avoid changing PUDn when disabling bias | Geert Uytterhoeven | 1 | -7/+7 |
| 2021-05-31 | pinctrl: renesas: r8a77980: Add bias pinconf support | Geert Uytterhoeven | 1 | -6/+203 |
| 2021-05-31 | pinctrl: renesas: r8a77970: Add bias pinconf support | Geert Uytterhoeven | 1 | -6/+169 |
| 2021-05-31 | pinctrl: renesas: r8a7794: Add bias pinconf support | Geert Uytterhoeven | 1 | -9/+351 |
| 2021-05-31 | pinctrl: renesas: r8a7792: Add bias pinconf support | Geert Uytterhoeven | 1 | -12/+521 |
| 2021-05-31 | pinctrl: renesas: r8a7790: Add bias pinconf support | Geert Uytterhoeven | 1 | -7/+294 |
| 2021-05-31 | pinctrl: renesas: r8a77470: Add bias pinconf support | Geert Uytterhoeven | 1 | -40/+306 |
| 2021-05-11 | pinctrl: renesas: r8a779{51,6,65}: Reduce non-functional differences | Geert Uytterhoeven | 3 | -44/+46 |
| 2021-05-11 | pinctrl: renesas: r8a7778: Remove unused PORT_GP_PUP_1() macro | Geert Uytterhoeven | 1 | -3/+0 |
| 2021-05-11 | pinctrl: renesas: r8a77990: Drop bogus PUEN_ prefixes in comments | Geert Uytterhoeven | 1 | -4/+4 |
| 2021-05-11 | pinctrl: renesas: r8a77990: JTAG pins do not have pull-down capabilities | Geert Uytterhoeven | 1 | -4/+4 |
| 2021-05-11 | pinctrl: renesas: r8a7796: Add missing bias for PRESET# pin | Geert Uytterhoeven | 1 | -1/+2 |
| 2021-03-24 | pinctrl: renesas: r8a7791: Add bias pinconf support | Geert Uytterhoeven | 1 | -16/+371 |
| 2021-03-24 | pinctrl: renesas: Add support for R-Car SoCs with pull-down only pins | Geert Uytterhoeven | 2 | -19/+34 |
| 2021-03-24 | pinctrl: renesas: Add PORT_GP_CFG_7 macros | Geert Uytterhoeven | 1 | -2/+6 |
| 2021-03-24 | pinctrl: renesas: Factor out common R-Mobile bias handling | Geert Uytterhoeven | 5 | -126/+59 |
| 2021-03-24 | pinctrl: renesas: Move R-Car bias helpers to sh_pfc.h | Geert Uytterhoeven | 13 | -15/+7 |
| 2021-03-24 | pinctrl: renesas: Make sh_pfc_pin_to_bias_reg() static | Geert Uytterhoeven | 3 | -26/+22 |
| 2021-03-10 | pinctrl: renesas: r8a77965: Add vin4_g8 and vin5_high8 pins |   Niklas Söderlund | 1 | -1/+33 |
| 2021-03-10 | pinctrl: renesas: r8a77990: Add vin4_g8 and vin5_high8 pins | Niklas Söderlund | 1 | -1/+33 |
| 2021-03-10 | pinctrl: renesas: r8a7796: Add vin4_g8 and vin5_high8 pins | Niklas Söderlund | 1 | -1/+29 |
| 2021-03-10 | pinctrl: renesas: r8a77951: Add vin4_g8 and vin5_high8 pins | Niklas Söderlund | 1 | -1/+29 |
| 2021-01-18 | Merge tag 'renesas-pinctrl-for-v5.12-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into devel |   Linus Walleij | 6 | -17/+4531 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add TPU pins, groups and functions |   Ulrich Hecht | 1 | -0/+44 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add TMU pins, groups and functions | Ulrich Hecht | 1 | -0/+65 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add QSPI pins, groups, and functions | Ulrich Hecht | 1 | -0/+72 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add PWM pins, groups and functions | Ulrich Hecht | 1 | -0/+77 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add MSIOF pins, groups and functions | Ulrich Hecht | 1 | -0/+362 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add MMC pins, groups and functions | Ulrich Hecht | 1 | -0/+79 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add INTC-EX pins, groups and function | Ulrich Hecht | 1 | -0/+62 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add HSCIF pins, groups and functions | Ulrich Hecht | 1 | -0/+134 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add DU pins, groups and function | Ulrich Hecht | 1 | -0/+54 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add CANFD pins, groups and functions | Ulrich Hecht | 1 | -0/+137 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add EtherAVB pins, groups and functions | Ulrich Hecht | 1 | -0/+595 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add I2C pins, groups and functions | Ulrich Hecht | 1 | -0/+107 |
| 2021-01-14 | pinctrl: renesas: r8a779a0: Add SCIF pins, groups and functions | Ulrich Hecht | 1 | -0/+156 |
| 2021-01-14 | pinctrl: renesas: Initial R8A779A0 (V3U) PFC support | Ulrich Hecht | 5 | -0/+2529 |
| 2021-01-14 | pinctrl: renesas: Add PORT_GP_CFG_{2,31} macros | Ulrich Hecht | 1 | -4/+12 |
| 2021-01-14 | pinctrl: renesas: Add I/O voltage level flag | Ulrich Hecht | 2 | -2/+23 |
| 2021-01-14 | pinctrl: renesas: Implement unlock register masks | Ulrich Hecht | 2 | -11/+19 |
