| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2017-12-05 | pinctrl: sh-pfc: r8a7796: Rename RTS{0,1,3,4}# pin function definitions |   Takeshi Kihara | 1 | -24/+24 |
| 2017-12-05 | pinctrl: sh-pfc: r8a7796: Fix to delete A20..A25 pins function definitions | Takeshi Kihara | 1 | -12/+6 |
| 2017-10-20 | pinctrl: sh-pfc: r8a7796: Use generic IOCTRL register description |   Geert Uytterhoeven | 1 | -1/+11 |
| 2017-10-20 | pinctrl: sh-pfc: r8a7796: Use generic bias register description | Geert Uytterhoeven | 1 | -241/+258 |
| 2017-10-20 | pinctrl: sh-pfc: Drop width parameter of sh_pfc_{read,write}_reg() | Geert Uytterhoeven | 1 | -6/+6 |
| 2017-10-11 | pinctrl: sh-pfc: r8a7796: Fix trivial typo in comment |   Wolfram Sang | 1 | -1/+1 |
| 2017-10-11 | pinctrl: sh-pfc: r8a7796: Add support for INTC-EX IRQ pins | Takeshi Kihara | 1 | -0/+60 |
| 2017-08-16 | pinctrl: sh-pfc: r8a7796: Add USB3.0 host pins, groups and functions | Takeshi Kihara | 1 | -0/+15 |
| 2017-08-16 | pinctrl: sh-pfc: r8a7796: Add USB2.0 host pins, groups and functions | Takeshi Kihara | 1 | -0/+29 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Rename CS1# pin function definitions | Takeshi Kihara | 1 | -4/+4 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix IPSR and MOD_SEL register pin assignment for FSO pins group | Takeshi Kihara | 1 | -15/+11 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix to delete MOD_SEL0 bit2 register definitions | Takeshi Kihara | 1 | -2/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix to delete SATA_DEVSLP_B pins function definitions | Takeshi Kihara | 1 | -1/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix to delete FSCLKST pin and IPSR7 bit[15:12] register definitions | Takeshi Kihara | 1 | -5/+2 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix MOD_SEL register pin assignment for TCLK{1,2}_{A,B} pins group | Takeshi Kihara | 1 | -2/+2 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix NFDATA{0..13} and NF{ALE,CLE,WE_N,RE_N} pin function definitions | Takeshi Kihara | 1 | -18/+18 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix FMCLK{_C,_D} and FMIN{_C,_D} pin function definitions | Takeshi Kihara | 1 | -2/+2 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix SCIF_CLK_{A,B} pin's MOD_SEL assignment to MOD_SEL1 bit10 | Takeshi Kihara | 1 | -3/+3 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix MOD_SEL2 bit26 to 0x0 when using SCK5_A | Takeshi Kihara | 1 | -1/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix MOD_SEL1 bit[25:24] to 0x3 when using STP_ISEN_1_D | Takeshi Kihara | 1 | -1/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix MSIOF3 SS2_E mux | Geert Uytterhoeven | 1 | -1/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix IPSR setting for MSIOF3_SS1_E pin | Takeshi Kihara | 1 | -1/+1 |
| 2017-07-17 | pinctrl: sh-pfc: r8a7796: Fix MSIOF3_{SS1,SS2}_E pin function definitions | Takeshi Kihara | 1 | -2/+2 |
| 2017-05-16 | pinctrl: sh-pfc: r8a7796: Add Audio clock pin support |   Kuninori Morimoto | 1 | -0/+160 |
| 2017-05-16 | pinctrl: sh-pfc: r8a7796: Add Audio SSI pin support | Kuninori Morimoto | 1 | -0/+231 |
| 2017-05-16 | pinctrl: sh-pfc: r8a7796: Rename SSI_{WS,SCK}34 to SSI_{WS,SCK}349 | Kuninori Morimoto | 1 | -10/+10 |
| 2017-05-15 | pinctrl: sh-pfc: r8a7796: Rename SSI_{WS,SCK}0129 to SSI_{WS,SCK}01239 | Kuninori Morimoto | 1 | -6/+6 |
| 2017-05-15 | pinctrl: sh-pfc: r8a7796: Add group for AVB MDIO and MII pins | Geert Uytterhoeven | 1 | -3/+27 |
| 2017-05-15 | pinctrl: sh-pfc: r8a7796: Add PWM pins, groups and functions | Takeshi Kihara | 1 | -0/+153 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add HSCIF pins, groups, and functions |   Ulrich Hecht | 1 | -0/+283 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add MSIOF pins, groups and functions | Takeshi Kihara | 1 | -0/+913 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add CAN FD support |   Chris Paterson | 1 | -0/+37 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add CAN support | Chris Paterson | 1 | -0/+52 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add bias pinconf support |   Niklas Söderlund | 1 | -39/+315 |
| 2016-12-27 | pinctrl: sh-pfc: r8a7796: Add drive strength support | Niklas Söderlund | 1 | -12/+347 |
| 2016-11-15 | pinctrl: sh-pfc: r8a7796: Add DU support | Niklas Söderlund | 1 | -0/+101 |
| 2016-11-15 | pinctrl: sh-pfc: r8a7796: Add EtherAVB pins, groups and functions | Takeshi Kihara | 1 | -0/+87 |
| 2016-11-07 | pinctrl: sh-pfc: r8a7796: Fix GPSR definitions for SDHI2/3 | Geert Uytterhoeven | 1 | -10/+10 |
| 2016-10-17 | pinctrl: sh-pfc: r8a7796: Add DRIF support |   Ramesh Shanmugasundaram | 1 | -0/+291 |
| 2016-10-17 | pinctrl: sh-pfc: r8a7796: Add I2C pin support | Ulrich Hecht | 1 | -0/+77 |
| 2016-09-12 | pinctrl: sh-pfc: r8a7796: Add voltage switch operations for SDHI |   Simon Horman | 1 | -2/+26 |
| 2016-08-19 | pinctrl: sh-pfc: r8a7796: Add SDHI pins, groups and functions | Takeshi Kihara | 1 | -0/+275 |
| 2016-08-19 | pinctrl: sh-pfc: r8a7796: Add SCIF pins, groups and functions | Takeshi Kihara | 1 | -0/+300 |
| 2016-08-19 | pinctrl: sh-pfc: Initial R8A7796 PFC support | Takeshi Kihara | 1 | -0/+2072 |
