| Age | Commit message (Expand) | Author | Files | Lines |
|---|
| 2019-02-11 | pinctrl: sh-pfc: r8a77965: Add DRIF pins, groups and functions |   Takeshi Kihara | 1 | -0/+350 |
| 2019-02-11 | pinctrl: sh-pfc: r8a77965: Add TMU pins, groups and functions | Takeshi Kihara | 1 | -0/+48 |
| 2019-02-11 | pinctrl: sh-pfc: Validate fixed-size field widths at build time |   Geert Uytterhoeven | 1 | -1/+2 |
| 2019-02-11 | pinctrl: sh-pfc: sh73a0: Fix fsic_spdif pin groups | Geert Uytterhoeven | 1 | -1/+2 |
| 2019-02-11 | pinctrl: sh-pfc: r8a7792: Fix vin1_data18_b pin group | Geert Uytterhoeven | 1 | -0/+1 |
| 2019-02-11 | pinctrl: sh-pfc: r8a7791: Fix scifb2_data_c pin group | Geert Uytterhoeven | 1 | -1/+1 |
| 2019-02-11 | pinctrl: sh-pfc: emev2: Add missing pinmux functions | Geert Uytterhoeven | 1 | -0/+20 |
| 2019-02-05 | pinctrl: sh-pfc: r8a77990: Add DRIF pins, groups and functions | Takeshi Kihara | 1 | -2/+253 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7778: Fix HSPI pin numbers and names | Geert Uytterhoeven | 1 | -3/+3 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77990: Add TMU pins, groups and functions | Takeshi Kihara | 1 | -2/+51 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77965: Replace DU_DOTCLKIN2 by DU_DOTCLKIN3 | Geert Uytterhoeven | 1 | -3/+3 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7791: Fix VIN1 versioned groups | Geert Uytterhoeven | 1 | -34/+34 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77980: Deduplicate VIN1 pin definitions | Geert Uytterhoeven | 1 | -43/+21 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77970: Deduplicate VIN[01] pin definitions | Geert Uytterhoeven | 1 | -86/+42 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7796: Deduplicate VIN5 pin definitions | Geert Uytterhoeven | 1 | -64/+26 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7795: Deduplicate VIN5 pin definitions | Geert Uytterhoeven | 1 | -64/+26 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7794: Initialize TDSEL register for ES1.0 |   Wolfram Sang | 1 | -0/+16 |
| 2019-01-21 | pinctrl: sh-pfc: r8a7790: Initialize TDSEL register for ES1.0 | Wolfram Sang | 1 | -0/+17 |
| 2019-01-21 | pinctrl: sh-pfc: Print pin group when debugging | Geert Uytterhoeven | 1 | -0/+2 |
| 2019-01-21 | Revert "pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins" | Geert Uytterhoeven | 1 | -18/+5 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77990: GP6_9 does not have pull-down capability | Geert Uytterhoeven | 1 | -1/+10 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77995: Fix MOD_SEL bit numbering | Takeshi Kihara | 1 | -4/+7 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL bit numbering | Takeshi Kihara | 1 | -14/+18 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit2 when using RX2, TX2 and SCK2 | Takeshi Kihara | 1 | -5/+5 |
| 2019-01-21 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 bit3 when using TX0 | Takeshi Kihara | 1 | -2/+2 |
| 2018-12-18 | pinctrl: sh-pfc: Make pinmux_cfg_reg.var_field_width[] variable-length | Geert Uytterhoeven | 1 | -2/+1 |
| 2018-12-18 | pinctrl: sh-pfc: Print actual field width for variable-width fields | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: sh7734: Fix shifted values in IPSR10 | Geert Uytterhoeven | 1 | -8/+8 |
| 2018-12-18 | pinctrl: sh-pfc: sh7734: Remove bogus IPSR10 value | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: sh7269: Add missing PCIOR0 field | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: sh7264: Fix PFCR3 and PFCR0 register configuration | Geert Uytterhoeven | 1 | -2/+7 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77995: Remove bogus SEL_PWM[0-3]_3 configurations | Geert Uytterhoeven | 1 | -4/+4 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77990: Fix MOD_SEL0 SEL_I2C1 field width | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: sh7734: Add missing IPSR11 field | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77980: Add missing MOD_SEL0 field | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77970: Add missing MOD_SEL0 field | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a7794: Remove bogus IPSR9 field | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: Validate pins/marks in pin groups at build time | Geert Uytterhoeven | 1 | -1/+2 |
| 2018-12-18 | pinctrl: sh-pfc: sh73a0: Add missing TO pin to tpu4_to3 group | Geert Uytterhoeven | 1 | -0/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a7791: Remove bogus marks from vin1_b_data18 group | Geert Uytterhoeven | 1 | -3/+0 |
| 2018-12-18 | pinctrl: sh-pfc: r8a7791: Remove bogus ctrl marks from qspi_data4_b group | Geert Uytterhoeven | 1 | -2/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a7740: Add missing LCD0 marks to lcd0_data24_1 group | Geert Uytterhoeven | 1 | -0/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a7740: Add missing REF125CK pin to gether_gmii group | Geert Uytterhoeven | 1 | -1/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77990: Fix IOCTRL reg state after s2ram on R-Car E3 | Geert Uytterhoeven | 1 | -0/+1 |
| 2018-12-18 | pinctrl: sh-pfc: r8a77990: Add support for pull-up only pins | Geert Uytterhoeven | 1 | -5/+18 |
| 2018-11-20 | pinctrl: sh-pfc: r8a77980: Add QSPI pins, groups, and functions |   Dmitry Shifrin | 1 | -0/+70 |
| 2018-11-19 | pinctrl: sh-pfc: r8a77990: Add CAN FD pins, groups and functions | Takeshi Kihara | 1 | -2/+37 |
| 2018-11-19 | pinctrl: sh-pfc: r8a77990: Add CAN pins, groups and functions | Takeshi Kihara | 1 | -2/+49 |
| 2018-11-19 | pinctrl: sh-pfc: r8a77965: Add CAN FD pins, groups and functions | Takeshi Kihara | 1 | -0/+42 |
| 2018-11-19 | pinctrl: sh-pfc: r8a77965: Add CAN pins, groups and functions | Takeshi Kihara | 1 | -0/+58 |
