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Let the core handle the RTC range instead of open coding it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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The IRQ is requested before the struct rtc is allocated and registered, but
this struct is used in the IRQ handler. This may lead to a NULL pointer
dereference.
Switch to devm_rtc_allocate_device/rtc_register_device to allocate the rtc
struct before requesting the IRQ.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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We should get drvdata from struct device directly. Going via
platform_device is an unneeded step back and forth.
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Acked-by: Michal Simek <michal.simek@xilinx.com> (for zynqmp)
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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rtc_time64_to_tm never generates an invalid tm. It is not necessary to
validate it.
Signed-off-by: Alexandre Belloni <alexandre.belloni@bootlin.com>
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We program RTC time using SET_TIME_WRITE register and read the RTC
current time using CURRENT_TIME register. When we set the time by
writing into SET_TIME_WRITE Register and immediately try to read the
rtc time from CURRENT_TIME register, the previous old value is
returned instead of the new loaded time. This is because RTC takes
nearly 1 sec to update the new loaded value into the CURRENT_TIME
register. This behaviour is expected in our RTC IP.
This patch updates the driver to read the current time from SET_TIME_WRITE
register instead of CURRENT_TIME when rtc time is requested within an 1sec
period after setting the RTC time. Doing so will ensure the correct time is
given to the user.
Since there is a delay of 1sec in updating the CURRENT_TIME we are loading
set time +1sec while programming the SET_TIME_WRITE register, doing this
will give correct time without any delay when read from CURRENT_TIME.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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It is suggested to program CALIB_WRITE register with the calibration
value before updating the SET_TIME_WRITE register, doing so will
clear the Tick Counter and force the next second to be signaled
exactly in 1 second.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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In order to conserve battery energy, during the PS operation,
it is expected that the supply for the battery-powered domain
to be switched from the battery (VCC_PSBATT) to (VCC_PSAUX) and
automatically be switched back to battery when VCC_PSAUX voltage
drops below a limit, doing so prevents the logic within
the battery-powered domain from functioning incorrectly.
Signed-off-by: Anurag Kumar Vulisha <anuragku@xilinx.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Add support for RTC controller found on Xilinx Zynq Ultrascale+ MPSoC
platform.
Signed-off-by: Suneel Garapati <suneel.garapati@xilinx.com>
Acked-by: Moritz Fischer <moritz.fischer@ettus.com>
Signed-off-by: Alexandre Belloni <alexandre.belloni@free-electrons.com>
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Alexandre Belloni
Wolfram Sang
Anurag Kumar Vulisha
Suneel Garapati