linux-dev - Linux kernel development work

Age	Commit message (Collapse)	Author	Files	Lines
2018-01-16	soc: xilinx: xlnx_vcu: Use bitwise & rather than logical && on clkoutdiv	Gustavo A. R. Silva	1	-1/+1
	Currently clkoutdiv is being operated on by a logical && operator rather than a bitwise & operator. This looks incorrect as these should be bit flag operations. Addresses-Coverity-ID: 1463959 ("Logical vs. bitwise operator") Fixes: cee8113a295a ("soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver") Signed-off-by: Gustavo A. R. Silva <garsilva@embeddedor.com> Acked-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
2018-01-08	soc: xilinx: xlnx_vcu: Add Xilinx ZYNQMP VCU logicoreIP init driver	Dhaval Shah	1	-0/+630
	Xilinx ZYNQMP logicoreIP Init driver is based on the new LogiCoreIP design created. This driver provides the processing system and programmable logic isolation. Set the frequency based on the clock information get from the logicoreIP register set. Signed-off-by: Dhaval Shah <dshah@xilinx.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>