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path: root/drivers/spi/spi-fsl-dspi.c (follow)
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2019-10-15spi: use new `spi_transfer_delay_exec` helper where straightforwardAlexandru Ardelean1-2/+1
For many places in the spi drivers, using the new `spi_transfer_delay` helper is straightforward. It's just replacing: ``` if (t->delay_usecs) udelay(t->delay_usecs); ``` with `spi_transfer_delay(t)` which handles both `delay_usecs` and the new `delay` field. This change replaces in all places (in the spi drivers) where this change is simple. Signed-off-by: Alexandru Ardelean <alexandru.ardelean@analog.com> Link: https://lore.kernel.org/r/20190926105147.7839-10-alexandru.ardelean@analog.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-07spi: spi-fsl-dspi: Implement the PTP system timestamping for TCFQ modeVladimir Oltean1-0/+15
In this mode, the DSPI controller uses PIO to transfer word by word. In comparison, in EOQ mode the 4-word deep FIFO is being used, hence the current logic will need some adaptation for which I do not have the hardware (Coldfire) to test. It is not clear what is the timing of DMA transfers and whether timestamping in the driver brings any overall performance increase compared to regular timestamping done in the core. Short phc2sys summary after 58 minutes of running on LS1021A-TSN with interrupts disabled during the critical section: offset: min -26251 max 16416 mean -21.8672 std dev 863.416 delay: min 4720 max 57280 mean 5182.49 std dev 1607.19 lost servo lock 3 times Summary of the same phc2sys service running for 120 minutes with interrupts disabled: offset: min -378 max 381 mean -0.0083089 std dev 101.495 delay: min 4720 max 5920 mean 5129.38 std dev 154.899 lost servo lock 0 times The minimum delay (pre to post time) in nanoseconds is the same, but the maximum delay is quite a bit higher, due to interrupts getting sometimes executed and interfering with the measurement. Hence set disable_irqs whenever possible (aka when the driver runs in poll mode - otherwise it would be a contradiction in terms). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190905010114.26718-4-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-02spi: spi-fsl-dspi: Always use the TCFQ devices in poll modeVladimir Oltean1-1/+4
With this patch, the "interrupts" property from the device tree bindings is ignored, even if present, if the driver runs in TCFQ mode. Switching to using the DSPI in poll mode has several distinct benefits: - With interrupts, the DSPI driver in TCFQ mode raises an IRQ after each transmitted word. There is more time wasted for the "waitq" event than for actual I/O. And the DSPI IRQ count can easily get the largest in /proc/interrupts on Freescale boards with attached SPI devices. - The SPI I/O time is both lower, and more consistently so. Attached to some Freescale devices are either PTP switches, or SPI RTCs. For reading time off of a SPI slave device, it is important that all SPI transfers take a deterministic time to complete. - In poll mode there is much less time spent by the CPU in hardirq context, which helps with the response latency of the system, and at the same time there is more control over when interrupts must be disabled (to get a precise timestamp measurement, which will come in a future patch): win-win. On the LS1021A-TSN board, where the SPI device is a SJA1105 PTP switch (with a bits_per_word=8 driver), I created a "benchmark" where I periodically transferred a 12-byte message once per second, for 120 seconds. I then recorded the time before putting the first byte in the TX FIFO, and the time after reading the last byte from the RX FIFO. That is the transfer delay in nanoseconds. Interrupt mode: delay: min 125120 max 168320 mean 150286 std dev 17675.3 Poll mode: delay: min 69440 max 119040 mean 70312.9 std dev 8065.34 Both the mean latency and the standard deviation are more than 50% lower in poll mode than in interrupt mode, and the 'max' in poll mode is lower than the 'min' in interrupt mode. This is with an 'ondemand' governor on an otherwise idle system - therefore running mostly at 600 MHz out of a max of 1200 MHz. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20191001205216.32115-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-10-01spi: Introduce dspi_slave_abort() function for NXP's dspi SPI driverLukasz Majewski1-0/+20
This change provides the dspi_slave_abort() function, which is a callback for slave_abort() method of SPI controller generic driver. As in the SPI slave mode the transmission is driven by master, any distortion may cause the slave to enter undefined internal state. To avoid this problem the dspi_slave_abort() terminates all pending and ongoing DMA transactions (with sync) and clears internal FIFOs. Signed-off-by: Lukasz Majewski <lukma@denx.de> Link: https://lore.kernel.org/r/20190924110547.14770-3-lukma@denx.de Signed-off-by: Mark Brown <broonie@kernel.org>
2019-09-03spi: spi-fsl-dspi: Fix race condition in TCFQ/EOQ interruptVladimir Oltean1-3/+1
When the driver is working in TCFQ/EOQ mode (i.e. interacts with the SPI controller's FIFOs directly) the following sequence of operations happens: - The first byte of the tx buffer gets pushed to the TX FIFO (dspi->len gets decremented). This triggers the train of interrupts that handle the rest of the bytes. - The dspi_interrupt handles a TX confirmation event. It reads the newly available byte from the RX FIFO, checks the dspi->len exit condition, and if there's more to be done, it kicks off the next interrupt in the train by writing the next byte to the TX FIFO. Now the problem is that the wait queue is woken up one byte too early, because dspi->len becomes 0 as soon as the byte has been pushed into the TX FIFO. Its interrupt has not yet been processed and the RX byte has not been put from the FIFO into the buffer. Depending on the timing of the wait queue wakeup vs the handling of the last dspi_interrupt, it can happen that the main SPI message pump thread has already returned back into the spi_device driver. When the rx buffer is on stack (which it can be, because in this mode, the DSPI doesn't do DMA), the last interrupt will perform a memory write into an rx buffer that has been freed. This manifests as stack corruption. The solution is to only wake up the wait queue when dspi_rxtx says so, i.e. after it has processed the last TX confirmation interrupt and collected the last RX byte. Fixes: c55be3059159 ("spi: spi-fsl-dspi: Use poll mode in case the platform IRQ is missing") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190903105708.32273-1-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-23spi: spi-fsl-dspi: Use poll mode in case the platform IRQ is missingVladimir Oltean1-23/+64
On platforms like LS1021A which use TCFQ mode, an interrupt needs to be processed after each byte is TXed/RXed. I tried to make the DSPI implementation on this SoC operate in other, more efficient modes (EOQ, DMA) but it looks like it simply isn't possible. Therefore allow the driver to operate in poll mode, to ease a bit of this absurd amount of IRQ load generated in TCFQ mode. Doing so reduces both the net time it takes to transmit a SPI message, as well as the inter-frame jitter that occurs while doing so. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190822211514.19288-5-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-23spi: spi-fsl-dspi: Remove impossible to reach error checkVladimir Oltean1-20/+4
dspi->devtype_data is under the total control of the driver. Therefore, a bad value is a driver bug and checking it at runtime (and during an ISR, at that!) is pointless. The second "else if" check is only for clarity (instead of a broader "else") in case other transfer modes are added in the future. But the printing is dead code and can be removed. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190822211514.19288-4-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-23spi: spi-fsl-dspi: Exit the ISR with IRQ_NONE when it's not oursVladimir Oltean1-1/+1
The DSPI interrupt can be shared between two controllers at least on the LX2160A. In that case, the driver for one controller might misbehave and consume the other's interrupt. Fix this by actually checking if any of the bits in the status register have been asserted. Fixes: 13aed2392741 ("spi: spi-fsl-dspi: use IRQF_SHARED mode to request IRQ") Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190822211514.19288-3-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-23spi: spi-fsl-dspi: Reduce indentation level in dspi_interruptVladimir Oltean1-39/+40
If the entire function depends on the SPI status register having the interrupt bits asserted, then just check it and exit early if those bits aren't set (such as in the case of the shared IRQ being triggered for the other peripheral). Cosmetic patch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190822211514.19288-2-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Move dspi_interrupt above dspi_transfer_one_messageVladimir Oltean1-57/+57
The two functions are loosely coupled through dspi->waitq, but logically, dspi_transfer_one_message depends on dspi_interrupt in order to complete. Move its definition above it so the I/O functions are grouped closer together. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-13-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Fix typosVladimir Oltean1-2/+2
mask of -> mask off at and -> and Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-12-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Use reverse Christmas tree declaration orderVladimir Oltean1-14/+14
This patch puts variable declaration in the reverse order of their length for cosmetic purposes. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-11-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Replace legacy spi_master names with spi_controllerVladimir Oltean1-50/+50
This adapts the spi-fsl-dspi driver to the API changes introduced in commit 8caab75fd2c2 ("spi: Generalize SPI "master" to "controller""). Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-10-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove pointless assignment of master->transfer to NULLVladimir Oltean1-1/+0
Introduced in commit 9298bc727385 ("spi: spi-fsl-dspi: Remove spi-bitbang") for less than obvious reasons, this assignment is confusing and serves no purpose. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-9-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove unused initialization of 'ret' in dspi_probeVladimir Oltean1-1/+1
There is no code path for reaching 'return ret;' without it first being assigned to an error code. Therefore the initialization with 0 is pointless. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-8-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Reduce indentation in dspi_release_dma()Vladimir Oltean1-11/+12
There is no point in surrounding an entire function block in an if condition. Rather, exit early if the condition is false. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-7-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Change usage pattern of SPI_MCR_* and SPI_CTAR_* macrosVladimir Oltean1-16/+21
These are macros that accept 0 or 1 as argument (a boolean value). Their use encourages the abuse of complex ternary operations inside their argument list, which detracts from the code readability. Replace these with simple if-else statements. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-6-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Demistify magic value in SPI_SR_CLEARVladimir Oltean1-1/+13
This patch adds the field definitions for the SPI_SR register. The SPI status register is write-1-to-clear and this value is written at init time. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-5-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Use BIT() and GENMASK() macrosVladimir Oltean1-29/+29
Switch to using more idiomatic register field definitions, which makes it easier to look them up in the datasheet. Cosmetic patch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-4-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Remove unused defines and includesVladimir Oltean1-26/+0
This is a cosmetic patch. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-3-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-20spi: spi-fsl-dspi: Fix code alignmentVladimir Oltean1-185/+185
This is a cosmetic patch that changes nothing except makes sure the code is aligned to the same column, which makes it easier to the eye. Signed-off-by: Vladimir Oltean <olteanv@gmail.com> Link: https://lore.kernel.org/r/20190818180115.31114-2-olteanv@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-1/+0
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-02-20Merge branch 'for-5.0' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.1Mark Brown1-1/+1
2019-02-06spi: spi-fsl-dspi: Provide support for DSPI slave mode operation (Vybryd vf610)Lukasz Majewski1-10/+30
The NXP's Vybryd vf610 can work as a SPI slave device (the CS and clock signals are provided by master). It is possible to specify a single device to work in that mode. As we do use DMA for transferring data, the RX channel must be prepared for incoming data. Moreover, in slave mode we just set a subset of control fields in configuration registers (CTAR0, PUSHR). For testing the spidev_test program has been used. Test script for this patch can be found here: https://github.com/lmajewski/tests-spi/blob/master/tests/spi/spi_tests.sh Signed-off-by: Lukasz Majewski <lukma@denx.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2019-01-07spi: fix initial SPI_SR value in spi-fsl-dspiAngelo Dureghello1-1/+1
On ColdFire mcf54418, using DSPI_DMA_MODE mode, spi transfers at first boot stage are not succeding: m25p80 spi0.1: unrecognized JEDEC id bytes: 00, 00, 00 The reason is the SPI_SR initial value set by the driver, that is not clearing (not setting to 1) the RF_DF flag. After a tour on the dspi hw modules that use this driver(Vybrid, ColdFire and ls1021a) a better init value for SR register has been set. Signed-off-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-11-05spi: spi-fsl-dspi: use IRQF_SHARED mode to request IRQChuanhua Han1-2/+2
Some SoC share one irq number between DSPI controllers. For example, on the LX2160 board, DSPI0 and DSPI1 share one irq number. In this case, only one DSPI controller can register successfully, and others will fail. Signed-off-by: Chuanhua Han <chuanhua.han@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-08-28spi: spi-fsl-dspi: fix broken DSPI_EOQ_MODEAngelo Dureghello1-0/+6
This patch fixes the dspi_eoq_write function used by the ColdFire mcf5441x family. The 16 bit cmd part must be re-set at each data transfer. Also, now that fifo_size variables are used for eoq_read/write, a proper fifo size must be set (16 slots for the ColdFire dspi module version). Signed-off-by: Angelo Dureghello <angelo@sysam.it> Acked-by: Esben Haabendal <esben@haabendal.dk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2018-07-24spi: spi-fsl-dspi: Switch to SPDX identifierFabio Estevam1-14/+6
Adopt the SPDX license identifier headers to ease license compliance management. Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-17spi: spi-fsl-dspi: Fill actual_length when doing DMA transferAndrey Smirnov1-2/+5
Upper layer users of SPI device drivers may rely on 'actual_length', so it is important that information is correctly reported. One such example is spi_mem_exec_op() function that will fail if 'actual_length' of the data transferred is not what was requested. Add necessary code to populate 'actual_length. Cc: Mark Brown <broonie@kernel.org> Cc: Sanchayan Maity <maitysanchayan@gmail.com> Cc: Stefan Agner <stefan@agner.ch> Cc: cphealy@gmail.com Cc: linux-spi@vger.kernel.org Cc: linux-kernel@vger.kernel.org Signed-off-by: Andrey Smirnov <andrew.smirnov@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-07-02spi: spi-fsl-dspi: Fix imprecise abort on VF500 during probeKrzysztof Kozlowski1-12/+12
Registers of DSPI should not be accessed before enabling its clock. On Toradex Colibri VF50 on Iris carrier board this could be seen during bootup as imprecise abort: Unhandled fault: imprecise external abort (0x1c06) at 0x00000000 Internal error: : 1c06 [#1] ARM Modules linked in: CPU: 0 PID: 1 Comm: swapper Not tainted 4.14.39-dirty #97 Hardware name: Freescale Vybrid VF5xx/VF6xx (Device Tree) Backtrace: [<804166a8>] (regmap_write) from [<80466b5c>] (dspi_probe+0x1f0/0x8dc) [<8046696c>] (dspi_probe) from [<8040107c>] (platform_drv_probe+0x54/0xb8) [<80401028>] (platform_drv_probe) from [<803ff53c>] (driver_probe_device+0x280/0x2f8) [<803ff2bc>] (driver_probe_device) from [<803ff674>] (__driver_attach+0xc0/0xc4) [<803ff5b4>] (__driver_attach) from [<803fd818>] (bus_for_each_dev+0x70/0xa4) [<803fd7a8>] (bus_for_each_dev) from [<803fee74>] (driver_attach+0x24/0x28) [<803fee50>] (driver_attach) from [<803fe980>] (bus_add_driver+0x1a0/0x218) [<803fe7e0>] (bus_add_driver) from [<803fffe8>] (driver_register+0x80/0x100) [<803fff68>] (driver_register) from [<80400fdc>] (__platform_driver_register+0x48/0x50) [<80400f94>] (__platform_driver_register) from [<8091cf7c>] (fsl_dspi_driver_init+0x1c/0x20) [<8091cf60>] (fsl_dspi_driver_init) from [<8010195c>] (do_one_initcall+0x4c/0x174) [<80101910>] (do_one_initcall) from [<80900e8c>] (kernel_init_freeable+0x144/0x1d8) [<80900d48>] (kernel_init_freeable) from [<805ff6a8>] (kernel_init+0x10/0x114) [<805ff698>] (kernel_init) from [<80107be8>] (ret_from_fork+0x14/0x2c) Cc: <stable@vger.kernel.org> Fixes: 5ee67b587a2b ("spi: dspi: clear SPI_SR before enable interrupt") Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-21spi: spi-fsl-dspi: Fix copy-paste error in dspi_probeGustavo A. R. Silva1-1/+1
It seems that the proper structure field to use in this particular case is *regmap_pushr* instead of regmap. Addresses-Coverity-ID: 1470126 ("Copy-paste error") Fixes: 58ba07ec79e6 ("spi: spi-fsl-dspi: Add support for XSPI mode registers") Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com> Acked-by: Esben Haabendal <eha@deif.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Enable extended SPI modeEsben Haabendal1-1/+3
Set the XSPI bit for devices configured for XSPI mode (currently LS1021A), and thereby switch to extended SPI mode, allowing for SPI transfers using from 4 to 32 bits per word instead of 4 to 16 bits per word. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Advertise 32 bit for XSPI modeEsben Haabendal1-1/+5
Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: XSPI FIFO handling (in TCFQ mode)Esben Haabendal1-7/+48
This implements handling of split CMD and TX FIFO queues for XSPI when running in TCFQ mode. It should be simple to add it to EOQ mode also. Currently, EOQ mode is only used with coldfire. So if coldfire DSPI supports XSPI, XSPI FIFO handling should be added to EOQ mode also. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Framesize control for XSPI modeEsben Haabendal1-0/+10
Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Add support for XSPI mode registersEsben Haabendal1-2/+61
This prepares for adding support for extended SPI mode (XSPI), by extending the regmap with the extra SREX and CTAREx registers. An additional register map is made for allowing 16 bit access to CMD and TX FIFO of the PUSHR register separately, which is also needed for XSPI mode support. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20Merge branch 'spi-4.18' into spi-4.19 for DSPI depMark Brown1-0/+12
2018-06-20spi: spi-fsl-dspi: Fixup regmap configurationEsben Haabendal1-0/+12
Mark volatile registers to avoid caching bugs. Note: SPI_MCR is marked volatile because of CLR_TXF and CLR_RXF bits. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Fix MCR register handlingEsben Haabendal1-7/+3
The MCR register is not changed, so initialize it in dspi_init(). The exception is the CLR_TXF and CLR_RXF bits, which should be written to before each transfer to make sure we start with empty FIFOs. With MCR register now configured as volatile, the regmap_update_bits will do a real read-modify-write cycle. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Support 4 to 16 bits per word transfersEsben Haabendal1-163/+88
This extends the driver with support for all SPI framesizes from 4 to 16 bits, and adds support for per transfer specific bits_per_word, while at the same time reducing code size and complexity. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Simplify transfer counter handlingEsben Haabendal1-25/+14
Simplify driver by avoiding counter wrapping by clearing transfer counter on first SPI transfer per interrupt instead of tracking what it was before. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Fix per transfer cs_change handlingEsben Haabendal1-28/+40
As of 92dc20d83adec565378254c0630e839ff5674e14, transfer->cs_change has been supported for non-last transfers, but not for last transfer. This change brings handling of cs_change in line with the specification in spi.h, implementing handling of transfer->cs_change for all transfers. The value for CMD FIFO is precalculated with transfer->cs_change field taken into account, allowing for CS de-activate between transfers and keeping CS activated after last transfer. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Drop unneeded use of dataflags bitsEsben Haabendal1-15/+8
Checking directly against pointer value should be at least as fast as doing bitmasking and compare, so let's keep it simple. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-06-20spi: spi-fsl-dspi: Drop unreachable else if statementEsben Haabendal1-2/+1
The if statement just above this if/else statement triggers on the same condition, and then invalidates it. Signed-off-by: Esben Haabendal <eha@deif.com> Acked-by: Martin Hundebøll <martin@geanix.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-01-03spi: spi-fsl-dspi: account for const type of of_device_id.dataJulia Lawall1-4/+3
This driver creates a number of const structures that it stores in the data field of an of_device_id array. The data field of an of_device_id structure has type const void *, so there is no need for a const-discarding cast when putting const values into such a structure. Done using Coccinelle. Signed-off-by: Julia Lawall <Julia.Lawall@lip6.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-16spi: spi-fsl-dspi: add SPI_LSB_FIRST to driver capabilitiesKurt Kanzenbach1-1/+1
The driver as well as the controller support the SPI lsb first mode. However, it's not possible to configure it e.g. when using spidev. Adding this flag to mode_bits resolves the issue and lsb first mode can be used. Signed-off-by: Kurt Kanzenbach <kurt@linutronix.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-11-03spi: spi-fsl-dspi: enabling Coldfire mcf5441x dspiAngelo Dureghello1-21/+45
Signed-off-by: Angelo Dureghello <angelo@sysam.it> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-05-22spi: spi-fsl-dspi: ensure non-zero return on error pathNikita Yushchenko1-1/+2
Propagate error return from dspi_request_dma() into probe routine's return. Signed-off-by: Nikita Yushchenko <nikita.yoush@cogentembedded.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-19spi: spi-fsl-dspi: Fix error handlingChristophe JAILLET1-1/+2
According to error handling in this function, it is likely that going to 'out_master_put' was expected here. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-12-12Merge remote-tracking branches 'spi/topic/delay', 'spi/topic/dw', 'spi/topic/fsl-dspi' and 'spi/topic/fsl-espi' into spi-nextMark Brown1-4/+302
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