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path: root/drivers/spi/spi-ti-qspi.c (follow)
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2022-06-06spi: spi-ti-qspi: Support per-transfer and per-slave speed_hz settingsAtsushi Nemoto1-36/+39
The spi-ti-qspi driver initializes its spi clock by the spi-max-frequency property from the controller node, and ignores per-transfer (and per-slave) speed_hz settings. Isolate clock settings out from ti_qspi_setup() and call it from ti_qspi_start_transfer_one() and ti_qspi_exec_mem_op(), using per-transfer speed_hz and per-slave max_speed_hz settings. Also drop spi_max_frequency from struct ti_qspi and use spi_master's max_speed_hz. Signed-off-by: Atsushi Nemoto <atsushi.nemoto@sord.co.jp> Link: https://lore.kernel.org/r/20220519.084604.966119051165023533.atsushi.nemoto@sord.co.jp Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-19spi: spi-ti-qspi: using pm_runtime_resume_and_get instead of pm_runtime_get_syncMinghao Chi1-2/+1
Using pm_runtime_resume_and_get is more appropriate for simplifing code Reported-by: Zeal Robot <zealci@zte.com.cn> Signed-off-by: Minghao Chi <chi.minghao@zte.com.cn> Link: https://lore.kernel.org/r/20220408080931.2494356-1-chi.minghao@zte.com.cn Signed-off-by: Mark Brown <broonie@kernel.org>
2022-04-11spi: spi-ti-qspi: Fix return value handling of wait_for_completion_timeoutMiaoqian Lin1-2/+3
wait_for_completion_timeout() returns unsigned long not int. It returns 0 if timed out, and positive if completed. The check for <= 0 is ambiguous and should be == 0 here indicating timeout which is the only error case. Fixes: 5720ec0a6d26 ("spi: spi-ti-qspi: Add DMA support for QSPI mmap read") Signed-off-by: Miaoqian Lin <linmq006@gmail.com> Link: https://lore.kernel.org/r/20220411111034.24447-1-linmq006@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
2021-03-10spi: spi-ti-qspi: Free DMA resourcesTudor Ambarus1-6/+14
Release the RX channel and free the dma coherent memory when devm_spi_register_master() fails. Fixes: 5720ec0a6d26 ("spi: spi-ti-qspi: Add DMA support for QSPI mmap read") Cc: stable@vger.kernel.org Signed-off-by: Tudor Ambarus <tudor.ambarus@microchip.com> Link: https://lore.kernel.org/r/20210218130950.90155-1-tudor.ambarus@microchip.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-11-09spi: spi-ti-qspi: fix reference leak in ti_qspi_setupZhang Qilong1-0/+1
pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to pm_runtime_put_noidle will result in reference leak in ti_qspi_setup, so we should fix it. Fixes: 505a14954e2d7 ("spi/qspi: Add qspi flash controller") Signed-off-by: Zhang Qilong <zhangqilong3@huawei.com> Link: https://lore.kernel.org/r/20201103140947.3815-1-zhangqilong3@huawei.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-07-09SPI SUBSYSTEM: Replace HTTP links with HTTPS onesAlexander A. Klimov1-1/+1
Rationale: Reduces attack surface on kernel devs opening the links for MITM as HTTPS traffic is much harder to manipulate. Deterministic algorithm: For each file: If not .svg: For each line: If doesn't contain `\bxmlns\b`: For each link, `\bhttp://[^# \t\r\n]*(?:\w|/)`: If neither `\bgnu\.org/license`, nor `\bmozilla\.org/MPL\b`: If both the HTTP and HTTPS versions return 200 OK and serve the same content: Replace HTTP with HTTPS. Signed-off-by: Alexander A. Klimov <grandmaster@al2klimov.de> Link: https://lore.kernel.org/r/20200708194400.22213-1-grandmaster@al2klimov.de Signed-off-by: Mark Brown <broonie@kernel.org>
2020-01-17spi: spi-ti-qspi: fix warningJean Pihet1-0/+1
drivers/spi/spi-ti-qspi.c: In function ‘ti_qspi_start_transfer_one’: drivers/spi/spi-ti-qspi.c:392:8: warning: ‘rx_wlen’ may be used uninitialized in this function [-Wmaybe-uninitialized] 392 | if (rx_wlen >= 32) | ^ drivers/spi/spi-ti-qspi.c:318:12: note: ‘rx_wlen’ was declared here 318 | u8 rxlen, rx_wlen; | ^~~~~~~ The warning is a false positive; it is not thrown by all compiler versions, e.g. Red Hat Cross 9.2.1-1 but not Linaro GCC 7.5-2019.12. Signed-off-by: Jean Pihet <jean.pihet@newoldbits.com> Link: https://lore.kernel.org/r/20200115100700.3357-1-jean.pihet@newoldbits.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-01-14spi: spi-ti-qspi: optimize byte-transfersJean Pihet1-3/+51
Optimize the 8-bit based transfers, as used by the SPI flash devices, by reading the data registers by 32 and 128 bits when possible and copy the contents to the receive buffer. The speed improvement is 4.9x using quad read. Signed-off-by: Jean Pihet <jean.pihet@newoldbits.com> Cc: Ryan Barnett <ryan.barnett@rockwellcollins.com> Cc: Conrad Ratschan <conrad.ratschan@rockwellcollins.com> Cc: Arnout Vandecappelle <arnout.vandecappelle@essensium.com> Link: https://lore.kernel.org/r/20200114124125.361429-3-jean.pihet@newoldbits.com Signed-off-by: Mark Brown <broonie@kernel.org>
2020-01-14spi: spi-ti-qspi: support large flash devicesJean Pihet1-0/+30
The TI QSPI IP has limitations: - the MMIO region is 64MB in size - in non-MMIO mode, the transfer can handle 4096 words max. Add support for bigger devices. Use MMIO and DMA transfers below the 64MB boundary, use software generated transfers above. Signed-off-by: Jean Pihet <jean.pihet@newoldbits.com> Cc: Ryan Barnett <ryan.barnett@rockwellcollins.com> Cc: Conrad Ratschan <conrad.ratschan@rockwellcollins.com> Cc: Arnout Vandecappelle <arnout.vandecappelle@essensium.com> Link: https://lore.kernel.org/r/20200114124125.361429-2-jean.pihet@newoldbits.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-25Merge branch 'for-5.5' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi into spi-5.6Mark Brown1-1/+5
2019-12-17spi: spi-ti-qspi: Remove unused macro for fclk frequencyJean Pihet1-2/+0
The fclk and its rate are retrieved from DT. Signed-off-by: Jean Pihet <jean.pihet@newoldbits.com> Cc: Ryan Barnett <ryan.barnett@rockwellcollins.com> Cc: Conrad Ratschan <conrad.ratschan@rockwellcollins.com> Cc: Arnout Vandecappelle <arnout.vandecappelle@essensium.com> Link: https://lore.kernel.org/r/20191211193954.747745-2-jean.pihet@newoldbits.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-12-11spi: spi-ti-qspi: Fix a bug when accessing non default CSVignesh Raghavendra1-1/+5
When switching ChipSelect from default CS0 to any other CS, driver fails to update the bits in system control module register that control which CS is mapped for MMIO access. This causes reads to fail when driver tries to access QSPI flash on CS1/2/3. Fix this by updating appropriate bits whenever active CS changes. Reported-by: Andreas Dannenberg <dannenberg@ti.com> Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com> Link: https://lore.kernel.org/r/20191211155216.30212-1-vigneshr@ti.com Signed-off-by: Mark Brown <broonie@kernel.org>
2019-08-02spi: Remove dev_err() usage after platform_get_irq()Stephen Boyd1-1/+0
We don't need dev_err() messages when platform_get_irq() fails now that platform_get_irq() prints an error message itself when something goes wrong. Let's remove these prints with a simple semantic patch. // <smpl> @@ expression ret; struct platform_device *E; @@ ret = ( platform_get_irq(E, ...) | platform_get_irq_byname(E, ...) ); if ( \( ret < 0 \| ret <= 0 \) ) { ( -if (ret != -EPROBE_DEFER) -{ ... -dev_err(...); -... } | ... -dev_err(...); ) ... } // </smpl> While we're here, remove braces on if statements that only have one statement (manually). Cc: Mark Brown <broonie@kernel.org> Cc: linux-spi@vger.kernel.org Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org> Signed-off-by: Stephen Boyd <swboyd@chromium.org> Link: https://lore.kernel.org/r/20190730181557.90391-42-swboyd@chromium.org Signed-off-by: Mark Brown <broonie@kernel.org>
2019-06-05treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 296Thomas Gleixner1-8/+1
Based on 1 normalized pattern(s): this program is free software you can redistribute it and or modify it under the terms of the gplv2 this program is distributed in the hope that it will be useful but without any warranty without even the implied warranty of merchantability or fitness for a particular purpose see the gnu general public license for more details extracted by the scancode license scanner the SPDX license identifier GPL-2.0-only has been chosen to replace the boilerplate/reference in 1 file(s). Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Reviewed-by: Alexios Zavras <alexios.zavras@intel.com> Reviewed-by: Allison Randal <allison@lohutok.net> Cc: linux-spdx@vger.kernel.org Link: https://lkml.kernel.org/r/20190529141901.986607096@linutronix.de Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2019-01-29spi: ti-qspi: Fix mmap read when more than one CS in useVignesh R1-3/+3
Commit 4dea6c9b0b64 ("spi: spi-ti-qspi: add mmap mode read support") has has got order of parameter wrong when calling regmap_update_bits() to select CS for mmap access. Mask and value arguments are interchanged. Code will work on a system with single slave, but fails when more than one CS is in use. Fix this by correcting the order of parameters when calling regmap_update_bits(). Fixes: 4dea6c9b0b64 ("spi: spi-ti-qspi: add mmap mode read support") Cc: stable@vger.kernel.org Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-05-17spi: ti-qspi: Make sure res_mmap != NULL before dereferencing itBoris Brezillon1-1/+3
resource_size() is dereferencing the res without checking that it is not NULL, so we need to do the check before calling resource_size(). Fixes: b95cb394ab59 ("spi: ti-qspi: Implement the spi_mem interface") Reported-by: Dan Carpenter <dan.carpenter@oracle.com> Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-05-11spi: Get rid of the spi_flash_read() APIBoris Brezillon1-41/+0
This API has been replaced by the spi_mem_xx() one, its only user (spi-nor) has been converted to spi_mem_xx() and all SPI controller drivers that were implementing the ->spi_flash_xxx() hooks are also implementing the spi_mem ones. So we can safely get rid of this API. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Frieder Schrempf <frieder.schrempf@exceet.de> Tested-by: Frieder Schrempf <frieder.schrempf@exceet.de> Signed-off-by: Mark Brown <broonie@kernel.org>
2018-05-11spi: ti-qspi: Implement the spi_mem interfaceBoris Brezillon1-13/+71
The spi_mem interface is meant to replace the spi_flash_read() one. Implement the ->exec_op() method so that we can smoothly get rid of the old interface. Signed-off-by: Boris Brezillon <boris.brezillon@bootlin.com> Reviewed-by: Vignesh R <vigneshr@ti.com> Tested-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-04-26Merge remote-tracking branches 'spi/topic/ti-qspi' and 'spi/topic/xlp' into spi-nextMark Brown1-10/+60
2017-04-21spi: spi-ti-qspi: Use bounce buffer if read buffer is not DMA'bleVignesh R1-7/+59
Flash filesystems like JFFS2, UBIFS and MTD block layer can provide vmalloc'd or kmap'd buffers that cannot be mapped using dma_map_sg() and can potentially be in memory region above 32bit addressable region(ie buffers belonging to memory region backed by LPAE) of DMA, implement spi_flash_can_dma() interface to inform SPI core not to map such buffers. When buffers are not mapped for DMA, then use a pre allocated bounce buffer(64K = typical flash erase sector size) to read from flash and then do a copy to actual destination buffer. This is approach is much faster than using memcpy using CPU and also reduces CPU load. With this patch, UBIFS read speed is ~18MB/s and CPU utilization <20% on DRA74 Rev H EVM. Performance degradation is negligible when compared with non bounce buffer case while using UBIFS. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-27spi: spi-ti-qspi: Remove unused dma_dev variableVignesh R1-1/+0
commit 1351aaeb50b2 ("spi: spi-ti-qspi: Use dma_engine wrapper for dma memcpy call") introduced this warning: drivers/spi/spi-ti-qspi.c: In function 'ti_qspi_dma_xfer': drivers/spi/spi-ti-qspi.c:398:21: warning: unused variable 'dma_dev' [-Wunused-variable] struct dma_device *dma_dev = chan->device; Fix it by removing the unused variable. Signed-off-by: Vignesh R <vigneshr@ti.com> Reported-by: Stephen Rothwell <sfr@canb.auug.org.au> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-03-24spi: spi-ti-qspi: Use dma_engine wrapper for dma memcpy callVignesh R1-2/+1
Instead of calling device_prep_dma_memcpy() directly with dma_device pointer, use the newly introduced dmaengine_prep_dma_memcpy() wrapper API. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-19spi: spi-ti-qspi: Fix error handlingChristophe JAILLET1-1/+2
'dma_request_chan_by_mask()' can not return NULL. Try to keep the logic in 'no_dma:' by resetting 'qspi->rx_chan' in case of error. Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr> Signed-off-by: Mark Brown <broonie@kernel.org>
2017-02-17spi: ti-qspi: revise ti_qspi_probe() failure flowPrahlad V1-5/+10
call spi_master_put() in case of failures after spi_alloc_master(). call pm_runtime_disable() in case of failures after pm_runtime_enable(). Signed-off-by: Prahlad V <prahlad.eee@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-11-15spi: spi-ti-qspi: reinit of completion variablePrahlad V1-0/+1
completion variable should be reinitialized before reusing. Signed-off-by: Prahlad V <prahlad.eee@gmail.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-08-17spi: spi-ti-qspi: Add DMA support for QSPI mmap readVignesh R1-17/+122
Use mem-to-mem DMA to read from flash when reading in mmap mode. This gives improved read performance and reduces CPU load. With this patch the raw-read throughput is ~16MB/s on DRA74 EVM. And CPU load is <20%. UBIFS read throughput ~13 MB/s. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-07-24Merge remote-tracking branches 'spi/topic/spidev', 'spi/topic/sunxi', 'spi/topic/ti-qspi', 'spi/topic/topcliff-pch' and 'spi/topic/txx9' into spi-nextMark Brown1-1/+1
2016-06-26spi: ti-qspi: spelling mistake: "trasnfers" -> "transfers"Colin Ian King1-1/+1
trivial fix to spelling mistake in dev_dbg message Signed-off-by: Colin Ian King <colin.king@canonical.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-05-31spi: spi-ti-qspi: Suspend the queue before removing the deviceJean-Jacques Hiblot1-0/+7
Before disabling the pm_runtime, we must ensure that there is no transfer in progress nor will a new one be started. Otherwise the message pump will fail and in the end, the process requesting the transfer will be stuck. This behavior has been observed when transferring data from a SPI flash with dd while removing the module on a DRA7x-evm. Signed-off-by: Jean-Jacques Hiblot <jjhiblot@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2016-04-13spi: spi-ti-qspi: Handle truncated frames properlyBen Hutchings1-12/+20
We clamp frame_len_words to a maximum of 4096, but do not actually limit the number of words written or read through the DATA registers or the length added to spi_message::actual_length. This results in silent data corruption for commands longer than this maximum. Recalculate the length of each transfer, taking frame_len_words into account. Use this length in qspi_{read,write}_msg(), and to increment spi_message::actual_length. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-04-13spi: spi-ti-qspi: Fix FLEN and WLEN settings if bits_per_word is overriddenBen Hutchings1-6/+9
Each transfer can specify 8, 16 or 32 bits per word independently of the default for the device being addressed. However, currently we calculate the number of words in the frame assuming that the word size is the device default. If multiple transfers in the same message have differing bits_per_word, we bitwise-or the different values in the WLEN register field. Fix both of these. Also rename 'frame_length' to 'frame_len_words' to make clear that it's not a byte count like spi_message::frame_length. Signed-off-by: Ben Hutchings <ben.hutchings@codethink.co.uk> Signed-off-by: Mark Brown <broonie@kernel.org> Cc: stable@vger.kernel.org
2016-02-09spi: spi-ti-qspi: add mmap mode read supportVignesh R1-29/+110
ti-qspi controller provides mmap port to read data from SPI flashes. mmap port is enabled in QSPI_SPI_SWITCH_REG. ctrl module register may also need to be accessed for some SoCs. The QSPI_SPI_SETUP_REGx needs to be populated with flash specific information like read opcode, read mode(quad, dual, normal), address width and dummy bytes. Once, controller is in mmap mode, the whole flash memory is available as a memory region at SoC specific address. This region can be accessed using normal memcpy() (or mem-to-mem dma copy). The ti-qspi controller hardware will internally communicate with SPI flash over SPI bus and get the requested data. Implement spi_flash_read() callback to support mmap read over SPI flash devices. With this, the read throughput increases from ~100kB/s to ~2.5 MB/s. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-11-04Merge remote-tracking branches 'spi/topic/s3c64xx', 'spi/topic/ti-qspi' and 'spi/topic/txx9' into spi-nextMark Brown1-64/+21
2015-10-30spi: ti-qspi: improve ->remove() callbackFelipe Balbi1-10/+1
there's no need to call pm_runtime_get_sync() followed by pm_runtime_put(). We should, instead, just call pm_runtime_put_sync() and pm_runtime_disable(). Signed-off-by: Felipe Balbi <balbi@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-16spi: spi-ti-qspi: switch to polling mode for better r/w performanceVignesh R1-54/+20
Currently word completion interrupt is fired for transfer of every word(8bit to 128bit in size). This adds a lot of overhead, and decreases r/w throughput. It hardly takes 3us(@48MHz) for 128bit r/w to complete, hence its better to poll on word complete bit to be set in QSPI_SPI_STATUS_REG instead of using interrupts. This increases the throughput by 30% in both read and write case. So, switch to polling mode instead of interrupts to determine completion of word transfer. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-10-12spi: ti-qspi: Fix data corruption seen on r/w stress testVignesh R1-2/+1
Writing invalid command to QSPI_SPI_CMD_REG will terminate current transfer and de-assert the chip select. This has to be done before calling spi_finalize_current_message(). Because spi_finalize_current_message() will mark the end of current message transfer and schedule the next transfer. If the chipselect is not de-asserted before calling spi_finalize_current_message() then the next transfer will overlap with the previous transfer leading to data corruption. __spi_pump_message() can be called either from kthread worker context or directly from the calling process's context. It is possible that these two calls can race against each other. But race is serialized by checking whether master->cur_msg == NULL (pointer to msg being handled by transfer_one() at present). The master->cur_msg is set to NULL when spi_finalize_current_message() is called on that message, which means calling spi_finalize_current_message() allows __spi_sync() to pump next message in calling process context. Now if spi-ti-qspi calls spi_finalize_current_message() before we terminate transfer at hardware side, if __spi_pump_message() is called from process context then the successive transactions can overlap. Fix this by moving writing invalid command to QSPI_SPI_CMD_REG to before calling spi_finalize_current_message() call. Cc: stable@vger.kernel.org # v3.12+ Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-08-20spi: ti-qspi: use 128 bit transfer mode where possibleVignesh R1-4/+30
TI QSPI has four 32 bit data regsiters which can be used to transfer 16 bytes of data at once. The register group QSPI_SPI_DATA_REG_3, QSPI_SPI_DATA_REG_2, QSPI_SPI_DATA_REG_1 and QSPI_SPI_DATA_REG is treated as a single 128-bit word for shifting data in and out. The bit at QSPI_SPI_DATA_REG_3[31] position is the first bit to be shifted out in case of 128 bit transfer mode. Therefore the first byte to be written to flash should be at QSPI_SPI_DATA_REG_3[31-25] position. Instead of writing 1 byte at a time when interacting with spi-nor flash, make use of all the four registers so that 16 bytes can be transferred in one go. This reduces number of register writes and Word Complete interrupts for a given transfer message size, thereby increasing the write performance. Without this patch the raw flash write speed is ~100KB/s, with this patch the write speed increases to ~400 kB/s on DRA74 EVM. Signed-off-by: Vignesh R <vigneshr@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-02-21drivers: spi: ti-qspi: wait for busy bit clear before data write/readMugunthan V N1-0/+22
Data corruption is seen while reading/writing large data from/to qspi device because the data register is over written or read before data is ready which is denoted by busy bit in status register. SO adding a busy bit check before writing/reading data to/from qspi device. Signed-off-by: Mugunthan V N <mugunthanvnm@ti.com> Signed-off-by: Mark Brown <broonie@kernel.org>
2015-02-05spi: ti-qspi: cleanup wait_for_completion return handlingNicholas Mc Guire1-8/+6
return type of wait_for_completion_timeout is unsigned long not int, this patch uses the return value of wait_for_completion_timeout in the condition directly rather than assigning it to an incorrect type variable. Signed-off-by: Nicholas Mc Guire <hofrat@osadl.org> Signed-off-by: Mark Brown <broonie@kernel.org>
2014-10-20spi: drop owner assignment from platform_driversWolfram Sang1-1/+0
A platform_driver does not need to set an owner, it will be populated by the driver core. Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
2014-03-30Merge remote-tracking branches 'spi/topic/sunxi', 'spi/topic/tegra114', 'spi/topic/ti-qspi', 'spi/topic/ti-ssp', 'spi/topic/topcliff-pch', 'spi/topic/txx9', 'spi/topic/xcomm' and 'spi/topic/xfer' into spi-nextMark Brown1-1/+0
2014-03-30Merge remote-tracking branches 'spi/topic/bus-num', 'spi/topic/cleanup', 'spi/topic/clps711x', 'spi/topic/coldfire', 'spi/topic/completion' and 'spi/topic/davinci' into spi-nextMark Brown1-1/+0
2014-03-10spi/ti-qspi: Fix return from mmap pathSourav Poddar1-1/+0
mmap resource requirement is only for memory mapped operations. If the user does not populate mmap resource, dont call return, instead we go on for normal spi mode operations. Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-16spi: Remove explictly set bus_num and num_chipselect to default settingAxel Lin1-1/+0
The purpose of commit 1e8a52e18cfb "spi: By default setup spi_masters with 1 chipselect and dynamics bus number" is to avoid setting default value for bus_num and num_chipselect in spi master drivers. So let's remove the duplicate code. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de> Acked-By: David Daney <david.daney@cavium.com> Acked-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-02-07spi: Use SPI_BPW_MASK macro at appropriate placesAxel Lin1-1/+2
Signed-off-by: Axel Lin <axel.lin@ingics.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-23Merge remote-tracking branches 'spi/topic/pxa2xx', 'spi/topic/qspi', 'spi/topic/s3c24xx', 'spi/topic/s3c64xx', 'spi/topic/sh', 'spi/topic/tegra114', 'spi/topic/tegra20-sflash', 'spi/topic/tegra20-slink', 'spi/topic/txx9' and 'spi/topic/xcomm' into spi-linusMark Brown1-44/+73
2014-01-13spi: ti-qspi: Fixup driver nameAxel Lin1-1/+2
The driver name in current code looks like a compatible string which is not the naming convention for platform drivers. Fix it and also add modalias since this driver can be built as a module. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-13spi: ti-qspi: Simplify qspi_write_msg and qspi_read_msg implementationAxel Lin1-41/+20
Make the unit of wlen to be byte, and simplify the code to avoid duplicate code for different wlen cases. Signed-off-by: Axel Lin <axel.lin@ingics.com> Acked-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2014-01-07spi: ti-qspi: Fix getting correct address for qspiAxel Lin1-7/+1
Now platform_get_drvdata() returns the address of qspi rather than master. Also drop unneeded spi_unregister_master() call in ti_qspi_remove() because we use devm_spi_register_master() in probe. commit cbcabb7a300b "spi/qspi: Fix qspi remove path" assumes platform_get_drvdata() returns address of master. However, commit 160a061301c7 "spi/qspi: set correct platform drvdata in ti_qspi_probe()" pass qspi to platform_set_drvdata(). Signed-off-by: Axel Lin <axel.lin@ingics.com> Reviewed-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>
2013-12-31spi/qspi: Fix runtime resume pathSourav Poddar1-3/+1
Due to the following commit commit 160a061301c7adf54c40696e7ceedc73f6b747dd Author: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Date: Mon Nov 11 14:13:41 2013 +0800 spi/qspi: set correct platform drvdata in ti_qspi_probe() The ti_qspi_remove() use the platform drvdata as a type of struct ti_qspi, we should pass correct platform drvdata to platform_set_drvdata() in ti_qspi_probe(). Signed-off-by: Wei Yongjun <yongjun_wei@trendmicro.com.cn> Signed-off-by: Mark Brown <broonie@linaro.org> platform_set_drvdata was changed in the probe, so we need to correspondingly change deferencing of qspi in runtime resume path. Else, this will lead to a NULL dereference pointer. Based on v3.13-rc3 Signed-off-by: Sourav Poddar <sourav.poddar@ti.com> Signed-off-by: Mark Brown <broonie@linaro.org>