aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/staging/rtl8723au/hal (follow)
AgeCommit message (Expand)AuthorFilesLines
2015-04-03drivers: staging: rtl8723au: fix "warning: cast to restricted __le16"Piotr Witoslawski1-1/+1
2015-03-26staging: rtl8723au: Update RT_TRACE macro and usesJoe Perches10-261/+150
2015-03-23staging: rtl8723au: update_txdesc(): bagg_pkt is always falseJes Sorensen1-3/+3
2015-03-23staging: rtl8723au: Fix trailing whitespaceJes Sorensen1-1/+1
2015-03-16Staging: rtl8723au: Remove parentheses around right side an assignmentHaneen Mohammed6-15/+15
2015-03-09drivers: staging: rtl8723au: hal: Removed unnecessary parenthesesTina Johnson1-1/+1
2015-03-06staging: rtl8723au: Eliminate ODM_SetBBReg()Jes Sorensen2-25/+20
2015-03-06staging: rtl8723au: odm.c: Further reduce the use of ODM_SetBBReg()Jes Sorensen1-49/+119
2015-03-06staging: rtl8723au: Eliminate ODM_GetBBReg()Jes Sorensen2-22/+17
2015-03-06staging: rtl8723au: Get rid of ODM_Read4Byte()Jes Sorensen2-12/+4
2015-03-06staging: rtl8723au: Remove various ODM_* register access wrappersJes Sorensen1-53/+0
2015-03-06staging: rtl8723au: Eliminate ODM_Write1Byte()Jes Sorensen3-16/+5
2015-03-06staging: rtl8723au: odm_ConfigBB_PHY_8723A() always issues 32 bit writesJes Sorensen2-33/+30
2015-03-06staging: rtl8723au: odm_ConfigBB_AGC_8723A() always does 32 bit writesJes Sorensen2-13/+6
2015-03-06staging: rtl8723au: odm.c: Use rtl8723au_{read, write}32() for 32 bit register accessJes Sorensen1-19/+16
2015-03-06staging: rtl8723au: usb_halinit.c: Use rtl8723au_{read,write}32()Jes Sorensen1-22/+21
2015-03-06staging: rtl8723au: rtl8723a_phycfg.c: Use proper register read/write functionsJes Sorensen1-12/+9
2015-03-06staging: rtl8723au: writeOFDMPowerReg() use rtl8723au_write32()Jes Sorensen1-1/+1
2015-03-06staging: rtl8723au: Clean up PHY_{Query,Set}BBReg() 32 bit read/writesJes Sorensen1-93/+116
2015-03-06staging: rtl8723au: Reduce the usage of ODM_[GS]et_BBReg()Jes Sorensen1-43/+46
2015-03-06staging: rtl8723au: Remove pointless wrappers around odm_TXPowerTrackingInit()Jes Sorensen1-10/+3
2015-03-06staging: rtl8723au: Remove a number of unused entries from struct dm_odm_tJes Sorensen1-9/+0
2015-03-06staging: rtl8723au: remove extra parentheses around right bit shift operationsAya Mahfouz2-6/+6
2015-03-06staging: rtl8723au: odm.c: Break some lines down to 80 charactersJes Sorensen1-67/+117
2015-03-06staging: rtl8723au: ODM_Write_DIG23A(): Cosmetic cleanupsJes Sorensen1-7/+8
2015-03-06staging: rtl8723au: Clean up odm_RefreshRateAdaptiveMask()Jes Sorensen1-12/+15
2015-03-06staging: rtl8723au: Clean up FindMinimumRSSI()Jes Sorensen1-6/+4
2015-03-06staging: rtl8723au: Clean up odm_RSSIMonitorCheck()Jes Sorensen1-20/+21
2015-03-06staging: rtl8723au: ODM_TXPowerTrackingCheck23a(): Remove no-op functionJes Sorensen1-20/+0
2015-03-06staging: rtl8723au: Remove write only bIsCurRDLStateJes Sorensen1-1/+0
2015-03-06staging: rtl8723au: Remove unused Funai TV hackJes Sorensen2-9/+0
2015-03-06staging: rtl8723au: Remove write-only variable ControlChannelJes Sorensen1-9/+0
2015-03-06staging: rtl8723au: SupportInterface is always set to USBJes Sorensen6-33/+22
2015-03-06staging: rtl8723au: Remove no-op ODM_CMNINFO_PLATFORMJes Sorensen2-3/+0
2015-03-06staging: rtl8723au: odm_dtc(): Remove no-op functionJes Sorensen1-7/+0
2015-03-06staging: rtl8723au: Make odm_PHY_SaveAFERegisters() readableJes Sorensen1-7/+2
2015-03-06staging: rtl8723au: ODM_RF_CALIBRATION is never setJes Sorensen1-1/+1
2015-03-06staging: rtl8723au: ODM_RF_TX_PWR_TRACK is always setJes Sorensen2-12/+2
2015-03-06staging: rtl8723au: ODM_BB_PWR_SAVE is unusedJes Sorensen1-2/+1
2015-03-06staging: rtl8723au: ODM_BB_CCK_PD is always setJes Sorensen2-5/+1
2015-03-06staging: rtl8723au: ODM_BB_RSSI_MONITOR is always setJes Sorensen2-18/+2
2015-03-06staging: rtl8723au: ODM_BB_FA_CNT is always setJes Sorensen2-12/+2
2015-03-06staging: rtl8723au: ODM_BB_DYNAMIC_TXPWR isn't used for anythingJes Sorensen1-2/+1
2015-03-06staging: rtl8723au: ODM_BB_DIG is always setJes Sorensen2-5/+3
2015-03-06staging: rtl8723au: ODM_BB_RA_MASK is always setJes Sorensen2-16/+2
2015-03-06staging: rtl8723au: ODM_MAC_EDCA_TURBO is always setJes Sorensen2-4/+0
2015-03-06staging: rtl8723au: Avoid zero initializing variables unnecessarilyJes Sorensen1-2/+2
2015-03-06staging: rtl8723au: Variable bbtchange is always falseJes Sorensen1-2/+1
2015-03-06staging: rtl8723au: rtl8723a_hal_init.c: remove unnecessary bracesDaniele Alessandrelli1-26/+14
2015-03-06staging: rtl8723au: MAX_AGGR_NUM is not usedJes Sorensen1-1/+0
Copyright © 1996 – 2023 Jason A. Donenfeld. All Rights Reverse Engineered.