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2020-07-08drm/i915: Use the gt in HAS_ENGINEDaniele Ceraolo Spurio12-31/+38
2020-07-08drm/i915: Convert device_info to uncore/de_readDaniele Ceraolo Spurio1-30/+47
2020-07-08drm/i915/dp: Helper to check for DDI BUF status to get activeManasi Navare1-1/+16
2020-07-08drm/i915/dp: Helper for checking DDI_BUF_CTL Idle statusManasi Navare1-9/+8
2020-07-08drm/i915/huc: Adjust HuC state accordingly after GuC fetch errorMichał Winiarski1-1/+10
2020-07-08drm/i915/uc: Extract uc usage details into separate debugfsMichał Winiarski2-16/+36
2020-07-08drm/i915/hdcp: Fix the return handling of drm_hdcp_check_ksvs_revokedRamalingam C1-4/+4
2020-07-08drm/i915/hdcp: Update CP as per the kernel internal stateAnshuman Gupta1-4/+23
2020-07-07drm/i915/display: Implement new combo phy initialization stepJosé Roberto de Souza2-0/+34
2020-07-07drm/i915: Update dma-attributes for our sg DMAChris Wilson1-0/+2
2020-07-07drm/i915/gt: Pin the rings before marking activeChris Wilson1-6/+6
2020-07-06drm/i915: Fix spelling mistake in i915_reg.hFlavio Suligoi1-2/+2
2020-07-06drm/i915: Don't taint when using fault injectionMichał Winiarski1-1/+4
2020-07-06drm/i915: Print caller when tainting for CIMichał Winiarski6-8/+16
2020-07-06drm/i915: Reboot CI if we get wedged during driver initMichał Winiarski7-18/+30
2020-07-06Revert "drm/i915/dp: Correctly advertise HBR3 for GEN11+"Matt Atwood1-11/+17
2020-07-03drm/i915: Export ppgtt_bind_vmaChris Wilson8-60/+58
2020-07-03drm/i915/fbc: Allow FBC to recompress after a 3D workload on i85x/i865Ville Syrjälä2-0/+11
2020-07-03drm/i915/fbc: Enable fbc on i865Ville Syrjälä2-1/+3
2020-07-03drm/i915/fbc: Fix nuke for pre-snb platformsVille Syrjälä1-1/+33
2020-07-03drm/i915/fbc: Use the correct plane strideVille Syrjälä1-6/+10
2020-07-03drm/i915/tgl: Clamp min_cdclk to max_cdclk_freq to unblock 8KStanislav Lisovskiy1-2/+9
2020-07-03drm/i915/guc: Expand guc_info debugfs with more informationMichał Winiarski1-7/+16
2020-07-03drm/i915: do not read swizzle info if unavailableLucas De Marchi1-5/+9
2020-07-03drm/i915/gem: Split the context's obj:vma lut into its own mutexChris Wilson5-13/+26
2020-07-02drm/i915: Also drop vm.ref along error paths for vma constructionChris Wilson1-10/+6
2020-07-02drm/i915/gem: Drop forced struct_mutex from shrinker_taints_mutexChris Wilson1-11/+0
2020-07-02drm/i915/gem: Only revoke mmap handlers if activeChris Wilson3-28/+24
2020-07-02drm/i915/gem: Only revoke the GGTT mmappings on aperture detiling changesChris Wilson3-3/+6
2020-07-02drm/i915/display: prefer dig_port to reference intel_digital_portLucas De Marchi18-536/+533
2020-07-02drm/i915: Update DRIVER_DATE to 20200702Jani Nikula1-2/+2
2020-07-02drm/i915: Drop vm.ref for duplicate vma on constructionChris Wilson1-0/+1
2020-07-02drm/i915/gt: Move the heartbeat into the high priority system wqChris Wilson1-1/+1
2020-07-02drm/i915/gt: Harden the heartbeat against a stuck driverChris Wilson2-2/+13
2020-07-01drm/i915/dp: Correctly advertise HBR3 for GEN11+Matt Atwood1-17/+11
2020-07-01drm/i915: Fix g4x fbc watermark enableVille Syrjälä1-12/+21
2020-07-01drm/i915/icl+: Simplify combo/TBT PLL calculation call-chainImre Deak1-37/+27
2020-07-01drm/i915/tgl+: Fix TBT DPLL fractional divider for 38.4MHz ref clockImre Deak1-1/+12
2020-07-01drm/i915/gem: Move obj->lut_list under its own lockChris Wilson4-12/+20
2020-06-30drm/i915/display: remove alias to dig_portLucas De Marchi1-6/+5
2020-06-30drm/i915: Add PSR2 selective fetch registersJosé Roberto de Souza1-5/+63
2020-06-30drm/i915: Reorder intel_psr2_config_valid()José Roberto de Souza1-25/+25
2020-06-30drm/i915: Add plane damage clips propertyJosé Roberto de Souza2-0/+8
2020-06-30drm/i915/gem: Avoid kmalloc under i915->mm_lockChris Wilson2-68/+65
2020-06-30drm/i915: Suppress spurious underruns on gen2Ville Syrjälä1-0/+4
2020-06-30drm/i915/fbc: Reduce fbc1 compression interval to 1 secondVille Syrjälä1-2/+2
2020-06-30drm/i915/fbc: Store the fbc1 compression interval in the paramsVille Syrjälä2-7/+8
2020-06-30drm/i915/fbc: Parametrize FBC_CONTROLVille Syrjälä2-11/+15
2020-06-30drm/i915/fbc: Don't clear busy_bits for origin==GTTVille Syrjälä1-1/+9
2020-06-30drm/i915/fbc: Fix fence_y_offset handlingVille Syrjälä4-25/+25
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