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2022-07-06clk: qcom: add support for SM8350 GPUCCRobert Foss3-0/+646
2022-07-06clk: qcom: add camera clock controller driver for SM8450 SoCVladimir Zapolskiy3-0/+2864
2022-07-06clk: qcom: clk-alpha-pll: add Rivian EVO PLL configuration interfacesVladimir Zapolskiy2-0/+76
2022-07-06clk: qcom: clk-alpha-pll: add Lucid EVO PLL configuration interfacesVladimir Zapolskiy2-1/+68
2022-07-06clk: qcom: clk-alpha-pll: limit exported symbols to GPL licensed codeVladimir Zapolskiy1-4/+4
2022-07-06clk: qcom: clk-alpha-pll: fix clk_trion_pll_configure descriptionVladimir Zapolskiy1-1/+1
2022-07-06drm: xlnx: add <linux/io.h> for readl/writelRandy Dunlap1-0/+1
2022-07-06spi: Merge AMD fixMark Brown1-0/+8
2022-07-06spi: AMD SPI controller driver bug fix and cleanupsMark Brown1-23/+30
2022-07-06PCI: Drop of_match_ptr() to avoid unused variablesBjorn Helgaas4-4/+4
2022-07-06vfio/pci: fix the wrong wordBo Liu1-1/+1
2022-07-06drm/i915: Nuke PCH_JSPVille Syrjälä3-5/+4
2022-07-06drm/i915: Nuke PCH_MCCVille Syrjälä4-6/+5
2022-07-06drm/i915: Use short PCH names consistentlyVille Syrjälä1-5/+5
2022-07-06nvme: use struct group for generic command dwordsKeith Busch1-1/+1
2022-07-06Merge tag 'for-linus' of https://github.com/openrisc/linuxLinus Torvalds1-1/+0
2022-07-06phy: qcom-edp: add regulator_set_load to edp phyKuogee Hsieh1-0/+12
2022-07-06soundwire: qcom: Enable software clock gating requirement flagSrinivasa Rao Mandadapu1-1/+7
2022-07-06soundwire: qcom: Check device status before reading devidSrinivas Kandagatla1-0/+4
2022-07-06Merge tag 'irqchip-fixes-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/maz/arm-platforms into irq/urgentThomas Gleixner3-12/+33
2022-07-06dmaengine: altera-msgdma: Fixed some inconsistent function name descriptionsJiapeng Chong1-2/+2
2022-07-06dmaengine: imx-sdma: Add missing struct documentationShengjiu Wang1-1/+6
2022-07-06nvme-pci: phison e16 has bogus namespace idsKeith Busch1-1/+2
2022-07-06Merge tag 'tags/ib-mfd-soc-bcm-v5.20' into drivers/nextFlorian Fainelli2-44/+102
2022-07-06drm/msm/mdp5: move iommu_domain_alloc() call close to its usageDmitry Baryshkov3-24/+4
2022-07-06drm/msm/dpu: check both DPU and MDSS devices for the IOMMUDmitry Baryshkov1-3/+11
2022-07-06drm/msm: Fix %d vs %uRob Clark1-5/+5
2022-07-06drm/msm/dpu: move struct dpu_hw_blk definition to dpu_hw_utils.hDmitry Baryshkov12-36/+7
2022-07-06drm/msm/dpu: merge base_off with blk_off in struct dpu_hw_blk_reg_mapDmitry Baryshkov15-33/+20
2022-07-06drm/msm/dpu: drop length from struct dpu_hw_blk_reg_mapDmitry Baryshkov13-14/+1
2022-07-06drm/msm/dpu: drop xin_id from struct dpu_hw_blk_reg_mapDmitry Baryshkov1-2/+0
2022-07-06drm/msm/adreno: Allow larger address space sizeRob Clark4-1/+24
2022-07-06drm/msm/adreno: Fix up formattingKonrad Dybcio1-9/+8
2022-07-06drm/msm/a6xx: Add speedbin support for A619 GPUKonrad Dybcio1-0/+19
2022-07-06drm/msm/adreno: Add A619 supportKonrad Dybcio5-6/+169
2022-07-06drm/msm/adreno: Remove dead codeKonrad Dybcio1-2/+0
2022-07-06drm/msm: Avoid unclocked GMU register access in 6xx gpu_busyDouglas Anderson6-33/+53
2022-07-06coresight: Add config flag to enable branch broadcastJames Clark2-0/+16
2022-07-06drm/bridge: ti-sn65dsi86: Use atomic variants of drm_bridge_funcsSam Ravnborg1-8/+15
2022-07-06fbdev: fbmem: Fix logo center image dx issueGuiling Deng1-1/+1
2022-07-06drm/mediatek: dpi: Add dp_intf supportGuillaume Ranquet5-0/+51
2022-07-06drm/mediatek: dpi: Add pixels_per_iter config supportBo-Chen Chen1-3/+23
2022-07-06drm/mediatek: dpi: Add input_2pixel config supportBo-Chen Chen2-0/+8
2022-07-06drm/mediatek: dpi: Add config to support direct connection to dpi panelsBo-Chen Chen1-4/+12
2022-07-06drm/mediatek: dpi: Add YUV422 output supportBo-Chen Chen2-7/+30
2022-07-06spi: amd: Add struct and enum kernel-doc commentsCristian Ciocaltea1-2/+12
2022-07-06spi: amd: Drop io_base_addr member from struct amd_spiCristian Ciocaltea1-1/+0
2022-07-06spi: amd: Make use of dev_err_probe()Cristian Ciocaltea1-11/+8
2022-07-06spi: amd: Make use of devm_spi_alloc_master()Cristian Ciocaltea1-11/+4
2022-07-06spi: amd: Limit max transfer and message sizeCristian Ciocaltea1-0/+8
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