Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2019-10-31 | MIPS: Loongson64: Rename CPU TYPES | 1 | -1/+1 | |
2019-02-20 | drm: change func to better detect wether swiotlb is needed | 1 | -1/+1 | |
2019-02-06 | drm: disable uncached DMA optimization for ARM and arm64 | 1 | -0/+18 | |
2018-02-13 | drm: add func to get max iomem address v2 | 1 | -0/+2 | |
2017-01-10 | drm: Move drm_clflush prototypes to drm_cache header file | 1 | -0/+4 | |
2016-04-22 | drm: Loongson-3 doesn't fully support wc memory | 1 | -0/+2 | |
2016-02-02 | drm: add helper to check for wc memory support | 1 | -0/+9 | |
2009-08-27 | drm/ttm: consolidate cache flushing code in one place. | 1 | -0/+38 |