Age | Commit message (Expand) | Author | Files | Lines |
---|---|---|---|---|
2017-03-20 | clk: tegra: Add CEC clock | 1 | -1/+1 | |
2013-12-11 | clk: tegra: remove bogus PCIE_XCLK | 1 | -1/+1 | |
2013-11-26 | ARM: tegra30: add missing CLK IDs | 1 | -1/+9 | |
2013-05-28 | ARM: tegra30: create a DT header defining CLK IDs | 1 | -0/+265 |