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Conflicts:
arch/arm/boot/dts/imx6sx-sdb.dts
net/sched/cls_bpf.c
Two simple sets of overlapping changes.
Signed-off-by: David S. Miller <davem@davemloft.net>
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The two big changes are the additional of the watchdog clock, which
we currently only "fake" as the clock gate control is living in a
very strange place, but the watchdog driver needs to read the clock
rate from it and the setting of rk3288 plls to slow mode upon suspend.
Other than that some more exported clocks and a CLK_SET_RATE_PARENT
flag for the uart clocks.
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Add an LCC driver for MSM8960/APQ8064 that supports the i2s,
slimbus, and pcm clocks.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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Add defines to make more human readable numbers for the lpass
clock controller found on IPQ806x SoCs. Also remove the PLL4
define in gcc to avoid #define conflicts because that clock
doesn't exist in gcc, instead it lives in lcc.
Signed-off-by: Rajendra Nayak <rnayak@codeaurora.org>
[sboyd@codeaurora.org: Split off into separate patch]
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Tested-by: Kenneth Westfield <kwestfie@codeaurora.org>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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Merge "Allwinner device tree changes for 3.20" from Maxime Ripard:
A lot of changes to the device tree for the 3.20 merge window, mostly with:
- More DT license convertions, only two DTS and two DTSI are still uncertain
and have not been converted yet
- Use the C-preprocessor includes in the device trees.
- Add support for the A31s SoC and improve the A80 support
- Add IR receiver, lradc, PS/2 support
- Add cpufreq support for all SoCs but the A23 and A80.
- And a lot of new boards
* tag 'sunxi-dt-for-3.20' of https://git.kernel.org/pub/scm/linux/kernel/git/mripard/linux: (64 commits)
ARM: dts: sun5i: Enable axp209 support on A13-OLinuxIno
ARM: sunxi: dts: Add A10/A20 PS2 pin muxing options
ARM: sunxi: dts: Add PS2 nodes to dtsi for A10,A20
ARM: dts: sun6i: Add resistive touchscreen controller node to dtsi
ARM: dts: sun4i: Add Hyundau A7HD board
ARM: dts: sun4i: Add Marsboard A10 board
ARM: dts: sun9i: Enable mmc2 on A80 Optimus Board
ARM: dts: sun9i: Add 8 bit mmc pinmux setting for mmc2
ARM: dts: sun9i: Enable mmc0 on A80 Optimus Board
ARM: dts: sun9i: Convert a80 optimus board dts to label referencing
ARM: dts: sun9i: Add mmc controller nodes to the A80 dtsi
ARM: dts: sun9i: Add mmc config clock nodes
ARM: dts: sunxi: Add missing mdio label
ARM: dts: sun5i: Add mk802_a10s board
ARM: dts: sun4i: Add mk802ii board
ARM: dts: sun4i: Add mk802 board
ARM: dts: sun4i: Add dts file for Chuwi V7 CW0825 tablet
ARM: dts: sun7i: Add dts file for Bananapro board
ARM: sun6i: Enable ARM arch timers
ARM: dts: sun6i: Convert hummingbird a31 dts to label references
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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This is a driver for the pinmux and GPIO controller available in
Amlogic Meson SoCs. It currently supports only Meson8, however the
common code should be generic enough to work also for other SoCs after
having defined the proper set of functions and groups.
GPIO interrupts are not supported at the moment due to lack of
documentation.
Signed-off-by: Beniamino Galvani <b.galvani@gmail.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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This patch is a preparatory patch to be able to read Exynos thermal
configuration from the device tree.
It turned out that DTC is not able to interpret enums properly and hence
it is necessary to #define those values explicitly.
For this reason the ./include/dt-bindings/thermal/thermal_exynos.h file
has been introduced.
Signed-off-by: Lukasz Majewski <l.majewski@samsung.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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Merge "ARM: imx: device tree changes for 3.20" from Shawn Guo:
The i.MX device tree update for 3.20:
- Update i.MX6 operating-points setting in device tree to match the
latest i.MX6 data sheet
- Add i.MX6SX sabreauto board support
- Add imx6dl-udoo board support based off imx6q-udoo
- Update sabrelite board to include I2C and HDMI support
- Update the VPU compatible strings to also use cnm,coda<model>
- Remove the ocram clock from the VPU node, as the clock is already
provided inside the ocram node
- Add system reset controller and syscon-reboot for VF610
- Update VF610 device tree to use zero based naming for GPIO nodes,
so that the number scheme matches hardware manual
- A number of random device additions like watchdog for VF610, sahara
for i.MX53, QSPI for imx6sx-sdb board, etc.
Note: the branch imx/soc was merged into imx/dt because the SNVS device
tree node needs to refer to the new clock ID added by the imx/soc patch.
* tag 'imx-dt-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (28 commits)
ARM: dts: imx28-evk: remove duplicate property
ARM: vf610: use zero based naming for GPIO nodes
ARM: dts: imx6q: enable dma for ecspi5
ARM: dts: vfxxx: Add SNVS node
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: dts: imx6dl-udoo: Add board support based off imx6q-udoo
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: dts: imx6sx: add i.mx6sx sabreauto board support
ARM: dts: imx6sx-sdb: Add QSPI support
ARM: dts: imx6qdl: Remove OCRAM clock from VPU node
ARM: imx: apf51dev: add gpio-backlight support
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
ARM: i.MX53: dts: add sahara module
ARM: dts: imx6dl: correct cpufreq volt/freq table
ARM: dts: imx6q: update cpufreq volt/freq table
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge "ARM: imx: soc changes for 3.20" from Shawn Guo:
The i.MX SoC changes for 3.20:
- Add .disable_unused function hook for shared gate clock to ensure
the clock tree use count matches the hardware state
- Add a deeper idle state for i.MX6SX cpuidle driver powering off the
ARM core
- One correction on i.MX6Q esai_ipg parent clock setting
- Add a missing iounmap call for imx6q_opp_check_speed_grading()
- Add missing clocks for VF610 UART4, UART5 and SNVS blocks
- Expand VF610 device tree compatible matching table to cover more
Vybrid family SoCs
- Expand i.MX clk-pllv3 a bit with the shift for frequency multiplier
to support Vybrid's USB PLL oddity
* tag 'imx-soc-3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
ARM: clk-imx6q: refine esai_ipg's parent
ARM i.MX6q: unmap memory mapped at imx6q_opp_check_speed_grading()
ARM: imx: clk-vf610: Add clock for SNVS
ARM: imx: clk-vf610: Add clock for UART4 and UART5
ARM: imx: drop CPUIDLE_FLAG_TIME_VALID from cpuidle-imx6sx
ARM: imx: support arm power off in cpuidle for i.mx6sx
ARM: imx: remove unnecessary setting for DSM
ARM: imx: correct the hardware clock gate setting for shared nodes
ARM: imx: pllv3: add shift for frequency multiplier
ARM vf610: add compatibilty strings of supported Vybrid SoC's
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge "omap device tree changes for v3.20, part 2" from Tony Lindgren:
More changes for omap dts files mostly to add support for
dm816x devices and clocks. Also adds a qspi device for
dra72x-evm.
* tag 'omap-for-v3.20/dt-pt2' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap:
ARM: dts: dra72-evm: Add qspi device
ARM: dts: Add minimal support for dm8168-evm
ARM: dts: Add basic clocks for dm816x
ARM: dts: Add basic dm816x device tree configuration
Signed-off-by: Olof Johansson <olof@lixom.net>
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Add binding for the Qualcomm Resource Power Manager (RPM) found in 8660,
8960 and 8064 based devices.
Signed-off-by: Bjorn Andersson <bjorn.andersson@sonymobile.com>
Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Adds a new id for the pclk supplying the watchdog on rk3288 socs.
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Doug Anderson <dianders@chromium.org>
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Merge "STi DT updates for v3.20, round 1" from Maxime Coquelin:
Highlights:
-----------
- Add USB support for STiH410 & STiH407
- Add DRM DT nodes for STiH410 & STiH407
- Add STiH418 SoC support
- Add DT nodes for MiPHY28lp PHY
* tag 'sti-dt-for-v3.20-1' of git://git.stlinux.com/devel/kernel/linux-sti:
ARM: DT: STi: STiH407: Add DT node for MiPHY28lp
ARM: dts: STiH418: Add B2199 board support
ARM: dts: Add STiH418 SoC support
ARM: DT: STiH410: Add DRM dt nodes
ARM: DT: STiH407: Add DRM dt nodes
ARM: STi: DT: STiH410: Add DT nodes for the ehci and ohci usb controllers.
ARM: STi: DT: STiH410: Add usb2 picophy dt nodes
ARM: STi: DT: STiH407: Add usb2 picophy dt nodes
Signed-off-by: Olof Johansson <olof@lixom.net>
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The pinctrl nodes require some extra opaque arguments for the pull up and drive
strength values.
Introduce a new header file and convert the device trees to replace these
opaque numbers by defines.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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The DMA engine for the A10/A20 and derivatives require an opaque extra
argument.
Add a dt-bindings header, and convert the device trees to it.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
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Provide CLK support for Alphascale ASM9260 SoC.
Signed-off-by: Oleksij Rempel <linux@rempel-privat.de>
Signed-off-by: Michael Turquette <mturquette@linaro.org>
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This allows booting the device with basic functionality.
Note that at least on my revision c board the DDR3 does
not seem to work properly and only some of the memory
can be reliably used.
Also, the mainline u-boot does not seem to properly
initialize the ethernet, so I've been using the old TI
u-boot at:
http://arago-project.org/git/projects/?p=u-boot-omap3.git;a=summary
Cc: Brian Hutchinson <b.hutchman@gmail.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
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The STiH418 is advanced UHD 60fps AVC processor with 3D graphic acceleration and
quad-core ARM Cortex A9 CPU.
Reviewed-by: Peter Griffin <peter.griffin@linaro.org>
Signed-off-by: Maxime Coquelin <maxime.coquelin@st.com>
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Add required clk support for I2S, PCM and SPDIF.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Reviewed-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add clock support for 5 SPI channels.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add support for PDMA0 and PDMA1 gate clks.
Signed-off-by: Padmavathi Venna <padma.v@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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The new DT properties required for the I2S device node to be referred
as a clock provider and corresponding clock indices definition is added.
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Cc: Stephen Warren <swarren@nvidia.com>
Cc: Rob Herring <robh+dt@kernel.org>
Signed-off-by: Rob Herring <robh@kernel.org>
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Add support for clock gating of the SNVS peripheral.
Signed-off-by: Sanchayan Maity <maitysanchayan@gmail.com>
Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
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Merge "Renesas ARM Based SoC sh73a0 CCF Updates for v3.20" from Simon Horman:
* Add sh73a0 CCF support
* tag 'renesas-sh73a0-ccf-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas:
ARM: shmobile: sh73a0: disable legacy clock initialization
ARM: shmobile: sh73a0: add MSTP clock assignments to DT
ARM: shmobile: kzm9g-reference: Common clock framework DT description
ARM: shmobile: sh73a0: Common clock framework DT description
ARM: shmobile: sh73a0: Add CPG register bits header
clk: shmobile: sh73a0 common clock framework implementation
Signed-off-by: Olof Johansson <olof@lixom.net>
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Merge "Renesas ARM Based SoC DT Updates for v3.20" from Simon Horman:
* Use clock-indices instead of deprecated renesas,clock-indices
* Prepare for r8a73a4 multiplatform support
* Increase clock coverage for r8a779[014]
* Correct r8a7779 clock usage
* Correct LAN9220 VDDVARIO voltage on ape6evm
* Correct QSPI SPI-Flash mode of lager and koelsch
* Correct flash partition label and size on koelsch
* Correct mask for GIC PPI interrupts on r8a779[14]
* Correct BSC bus range on ape6evm-reference
* tag 'renesas-dt-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: (30 commits)
ARM: shmobile: r8a7791: add MLB+ clock
ARM: shmobile: r8a7790: add MLB+ clock
ARM: shmobile: ape6evm: Fix LAN9220 VDDVARIO voltage
ARM: shmobile: r8a73a4: Add r8a73a4-ape6evm.dtb to ARCH_SHMOBILE_MULTI
ARM: shmobile: ape6evm: Add keypad to the device tree
ARM: shmobile: ape6evm: Add LEDs to the device tree
ARM: shmobile: ape6evm: synchronize dts with reference platform
ARM: shmobile: ape6evm: fix compatible string for Ethernet controller
ARM: shmobile: r8a7794: Add MMCIF clock to device tree
ARM: shmobile: r8a7794: Add SDHI clocks to device tree
ARM: shmobile: r8a7794: Add I2C clocks to device tree
ARM: shmobile: r8a7779: Add TWD device to DTS
ARM: shmobile: r8a7779: Use MSTP for SCIF clocks
ARM: shmobile: r8a7779: Use R8A7779_CLK_P as SCIF parent clock
ARM: shmobile: r8a7794: Add QSPI clock to device tree
ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree
ARM: shmobile: koelsch: Fix QSPI mode of SPI-Flash into mode3
ARM: shmobile: r8a7794: Add USBDMAC[01] clocks to device tree
...
Signed-off-by: Olof Johansson <olof@lixom.net>
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Process-Voltage-Temperature Monitor has two clocks, PVTM_CORE and
PVTM_GPU.
Signed-off-by: Huang Lin <hl@rock-chips.com>
Signed-off-by: Dmitry Torokhov <dtor@chromium.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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There are 3 different parent clock from different usbphy,
all of them are fixed 480MHz, it is not able to auto select
by clock core to the 2nd and the 3rd parent.
For different use case for different board, we may need to
select different usbphy clock out as parent manually.
Add the clock ID for it so that we can use in dts.
Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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changes since v2:
1. remove SCLK_MAC_PLL
Signed-off-by: Roger Chen <roger.chen@rock-chips.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
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Adding required gate clocks for USB3.0 DRD controller
present on Exynos7.
Signed-off-by: Vivek Gautam <gautam.vivek@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add clock support for the MSCL block for Exynos7.
Signed-off-by: Tony K Nadackal <tony.kn@samsung.com>
Reviewed-by: Pankaj Dubey <pankaj.dubey@samsung.com>
Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com>
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Add MLB+ clock to R8A7791 device tree.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Add MLB+ clock to R8A7790 device tree.
Signed-off-by: Andrey Gusakov <andrey.gusakov@cogentembedded.com>
[Sergei: rebased, renamed, added changelog]
Signed-off-by: Sergei Shtylyov <sergei.shtylyov@cogentembedded.com>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device node; only add clock]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: omitted device nodes; only add clock]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Koji Matsuoka <koji.matsuoka.xm@renesas.com>
[horms: omitted device nodes and aliases; only add clocks]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Signed-off-by: Hisashi Nakamura <hisashi.nakamura.ak@renesas.com>
[horms: omitted device node and alias; only add clock]
[horms: use clock-indicies instead of renesas,clock-indicies]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Signed-off-by: Hiroyuki Yokoyama <hiroyuki.yokoyama.vx@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Signed-off-by: Ryo Kataoka <ryo.kataoka.wt@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com>
Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Tested-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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Signed-off-by: Kazuya Mizuguchi <kazuya.mizuguchi.ks@renesas.com>
[horms: merged per-clock patches]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Signed-off-by: Shinobu Uehara <shinobu.uehara.xc@renesas.com>
[horms: resolved conflicts]
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
Acked-by: Geert Uytterhoeven <geert+renesas@glider.be>
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Pull clk framework updates from Mike Turquette:
"This is much later than usual due to several last minute bugs that had
to be addressed. As usual the majority of changes are new drivers and
modifications to existing drivers. The core recieved many fixes along
with the groundwork for several large changes coming in the future
which will better parition clock providers from clock consumers"
* tag 'clk-for-linus-3.19' of git://git.linaro.org/people/mike.turquette/linux: (86 commits)
clk: samsung: Fix Exynos 5420 pinctrl setup and clock disable failure due to domain being gated
ARM: OMAP3: clock: fix boot breakage in legacy mode
ARM: OMAP2+: clock: fix DPLL code to use new determine rate APIs
clk: Really fix deadlock with mmap_sem
clk: mmp: fix sparse non static symbol warning
clk: Change clk_ops->determine_rate to return a clk_hw as the best parent
clk: change clk_debugfs_add_file to take a struct clk_hw
clk: Don't expose __clk_get_accuracy
clk: Don't try to use a struct clk* after it could have been freed
clk: Remove unused function __clk_get_prepare_count
clk: samsung: Fix double add of syscore ops after driver rebind
clk: samsung: exynos4: set parent of sclk_hdmiphy to hdmi
clk: samsung: exynos4415: Fix build with PM_SLEEP disabled
clk: samsung: remove unnecessary inclusion of header files from clk.h
clk: samsung: remove unnecessary CONFIG_OF from clk.c
clk: samsung: Spelling s/bwtween/between/
clk: rockchip: Add support for the mmc clock phases using the framework
clk: rockchip: add bindings for the mmc clocks
clk: rockchip: rk3288 export i2s0_clkout for use in DT
clk: rockchip: use clock ID for DMC (memory controller) on rk3288
...
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Pull thermal management update from Zhang Rui:
"Summary:
- of-thermal extension to allow drivers to register and use its
functionality in a better way, without exploiting thermal core.
From Lukasz Majewski.
- Fix a bug in intel_soc_dts_thermal driver which calls a sleep
function in interrupt handler. From Maurice Petallo.
- add a thermal UAPI header file for exporting the thermal generic
netlink information to user-space. From Florian Fainelli.
- First round of refactoring in Exynos driver. Bartlomiej and Lukasz
are attempting to make it lean and easier to understand.
- New thermal driver for Rockchip (rk3288), with support for DT
thermal. From Caesar Wang.
- New thermal driver for Nvidia, Tegra124 SOCTHERM driver, with
support for DT thermal. From Mikko Perttunen.
- New cooling device, based on common clock framework. From Eduardo
Valentin.
- a couple of small fixes in thermal core framework. From Srinivas
Pandruvada, Javi Merino, Luis Henriques.
- Dropping Armada A375-Z1 SoC thermal support as the chip is not in
the market, armada folks decided to drop its support.
- a couple of small fixes and cleanups in int340x thermal driver"
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux: (58 commits)
thermal: provide an UAPI header file
Thermal/int340x: Clear the error value of the last acpi_bus_get_device() call
thermal/powerclamp: add id for braswell cpu
thermal: Intel SoC DTS: Don't do thermal zone update inside spin_lock
Thermal: fix platform_no_drv_owner.cocci warnings
Thermal/int340x: avoid unnecessary pointer casting
thermal: int3403: Delete a check before thermal_zone_device_unregister()
thermal/int3400: export uuids
thermal: of: Extend current of-thermal.c code to allow setting emulated temp
thermal: of: Extend of-thermal to export table of trip points
thermal: of: Rename struct __thermal_trip to struct thermal_trip
thermal: of: Extend of-thermal.c to provide check if trip point is valid
thermal: of: Extend of-thermal.c to provide number of trip points
thermal: Fix error path in thermal_init()
thermal: lock the thermal zone when switching governors
thermal: core: ignore invalid trip temperature
thermal: armada: Remove support for A375-Z1 SoC
thermal: rockchip: add driver for thermal
dt-bindings: document Rockchip thermal
thermal: exynos: remove exynos_tmu_data.h include
...
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Pull USB updates from Greg KH:
"Here's the big set of USB and PHY patches for 3.19-rc1.
The normal churn in the USB gadget area is in here, as well as xhci
and other individual USB driver updates. The PHY tree is also in
here, as there were dependancies on the USB tree.
All of these have been in linux-next"
* tag 'usb-3.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/usb: (351 commits)
arm: omap3: twl: remove usb phy init data
usbip: fix error handling in stub_probe()
usb: gadget: udc: missing curly braces
USB: mos7720: delete some unneeded code
wusb: replace memset by memzero_explicit
usbip: remove unneeded structure
usb: xhci: fix comment for PORT_DEV_REMOVE
xhci: don't use the same variable for stopped and halted rings current TD
xhci: clear extra bits from slot context when setting max exit latency
xhci: cleanup finish_td function
USB: adutux: NULL dereferences on disconnect
usb: chipidea: fix platform_no_drv_owner.cocci warnings
usb: chipidea: Fixed a few typos in comments
Documentation: bindings: add doc for the USB2 ChipIdea USB driver
usb: chipidea: add a usb2 driver for ci13xxx
usb: chipidea: fix phy handling
usb: chipidea: remove duplicate dev_set_drvdata for host_start
usb: chipidea: parameter 'mode' isn't needed for hw_device_reset
usb: chipidea: add controller reset API
usb: chipidea: remove flag CI_HDRC_REQUIRE_TRANSCEIVER
...
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Pull dmaengine updates from Vinod Koul:
"Main features this time are:
- BAM v1.3.0 support form qcom bam dma
- support for Allwinner sun8i dma
- atmels eXtended DMA Controller driver
- chancnt cleanup by Maxime
- fixes spread over drivers"
* 'for-linus' of git://git.infradead.org/users/vkoul/slave-dma: (56 commits)
dmaenegine: Delete a check before free_percpu()
dmaengine: ioatdma: fix dma mapping errors
dma: cppi41: add a delay while setting the TD bit
dma: cppi41: wait longer for the HW to return the descriptor
dmaengine: fsl-edma: fixup reg offset and hw S/G support in big-endian model
dmaengine: fsl-edma: fix calculation of remaining bytes
drivers/dma/pch_dma: declare pch_dma_id_table as static
dmaengine: ste_dma40: fix error return code
dma: imx-sdma: clarify about firmware not found error
Documentation: devicetree: Fix Xilinx VDMA specification
dmaengine: pl330: update author info
dmaengine: clarify the issue_pending expectations
dmaengine: at_xdmac: Add DMA_PRIVATE
ARM: dts: at_xdmac: fix bad value of dma-cells in documentation
dmaengine: at_xdmac: fix missing spin_unlock
dmaengine: at_xdmac: fix a bug in transfer residue computation
dmaengine: at_xdmac: fix software lockup at_xdmac_tx_status()
dmaengine: at_xdmac: remove chancnt affectation
dmaengine: at_xdmac: prefer usage of readl/writel_relaxed
dmaengine: xdmac: fix print warning on dma_addr_t variable
...
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Pull MIPS updates from Ralf Baechle:
"This is an unusually large pull request for MIPS - in parts because
lots of patches missed the 3.18 deadline but primarily because some
folks opened the flood gates.
- Retire the MIPS-specific phys_t with the generic phys_addr_t.
- Improvments for the backtrace code used by oprofile.
- Better backtraces on SMP systems.
- Cleanups for the Octeon platform code.
- Cleanups and fixes for the Loongson platform code.
- Cleanups and fixes to the firmware library.
- Switch ATH79 platform to use the firmware library.
- Grand overhault to the SEAD3 and Malta interrupt code.
- Move the GIC interrupt code to drivers/irqchip
- Lots of GIC cleanups and updates to the GIC code to use modern IRQ
infrastructures and features of the kernel.
- OF documentation updates for the GIC bindings
- Move GIC clocksource driver to drivers/clocksource
- Merge GIC clocksource driver with clockevent driver.
- Further updates to bring the GIC clocksource driver up to date.
- R3000 TLB code cleanups
- Improvments to the Loongson 3 platform code.
- Convert pr_warning to pr_warn.
- Merge a bunch of small lantiq and ralink fixes that have been
staged/lingering inside the openwrt tree for a while.
- Update archhelp for IP22/IP32
- Fix a number of issues for Loongson 1B.
- New clocksource and clockevent driver for Loongson 1B.
- Further work on clk handling for Loongson 1B.
- Platform work for Broadcom BMIPS.
- Error handling cleanups for TurboChannel.
- Fixes and optimization to the microMIPS support.
- Option to disable the FTLB.
- Dump more relevant information on machine check exception
- Change binfmt to allow arch to examine PT_*PROC headers
- Support for new style FPU register model in O32
- VDSO randomization.
- BCM47xx cleanups
- BCM47xx reimplement the way the kernel accesses NVRAM information.
- Random cleanups
- Add support for ATH25 platforms
- Remove pointless locking code in some PCI platforms.
- Some improvments to EVA support
- Minor Alchemy cleanup"
* 'upstream' of git://git.linux-mips.org/pub/scm/ralf/upstream-linus: (185 commits)
MIPS: Add MFHC0 and MTHC0 instructions to uasm.
MIPS: Cosmetic cleanups of page table headers.
MIPS: Add CP0 macros for extended EntryLo registers
MIPS: Remove now unused definition of phys_t.
MIPS: Replace use of phys_t with phys_addr_t.
MIPS: Replace MIPS-specific 64BIT_PHYS_ADDR with generic PHYS_ADDR_T_64BIT
PCMCIA: Alchemy Don't select 64BIT_PHYS_ADDR in Kconfig.
MIPS: lib: memset: Clean up some MIPS{EL,EB} ifdefery
MIPS: iomap: Use __mem_{read,write}{b,w,l} for MMIO
MIPS: <asm/types.h> fix indentation.
MAINTAINERS: Add entry for BMIPS multiplatform kernel
MIPS: Enable VDSO randomization
MIPS: Remove a temporary hack for debugging cache flushes in SMTC configuration
MIPS: Remove declaration of obsolete arch_init_clk_ops()
MIPS: atomic.h: Reformat to fit in 79 columns
MIPS: Apply `.insn' to fixup labels throughout
MIPS: Fix microMIPS LL/SC immediate offsets
MIPS: Kconfig: Only allow 32-bit microMIPS builds
MIPS: signal.c: Fix an invalid cast in ISA mode bit handling
MIPS: mm: Only build one microassembler that is suitable
...
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Pull pin control changes from Linus Walleij:
"Here is a stash of pin control changes I have collected for the v3.19
series. Mainly new hardware support, with Intels new embedded SoC as
the especially interesting thing standing out, fully using the
subsystem.
- Force conversion of the ux500 pin control device trees and parsers
to use the generic pin control bindings.
- New driver and device tree bindings for the Qualcomm PMIC MPP pin
controller and GPIO.
- Some ACPI infrastructure for pin controllers.
- New driver for the Intel CherryView/Braswell pin controller, the
first Intel pin controller to fully take advantage of the pin
control subsystem.
- Support the Freescale i.MX VF610 variant.
- Support the sunxi A80 variant.
- Support the Samsung Exynos 4415 and Exynos 7 variants.
- Split out Intel pin controllers to their own subdirectory.
- A large slew of rockchip pin control updates, including
suspend/resume support.
- A large slew of Samsung Exynos pin controller updates.
- Various minor updates and fixes"
* tag 'pinctrl-v3.19-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (49 commits)
pinctrl: at91: enhance (debugfs) at91_gpio_dbg_show
pinctrl: meson: add device tree bindings documentation
gpio: tz1090: Fix error handling of irq_of_parse_and_map
pinctrl: tz1090-pinctrl.txt: Fix typo in binding
pinctrl: pinconf-generic: Declare dt_params/conf_items const
pinctrl: exynos: Add support for Exynos4415
pinctrl: exynos: Add initial driver data for Exynos7
pinctrl: exynos: Add irq_chip instance for Exynos7 wakeup interrupts
pinctrl: exynos: Consolidate irq domain callbacks
pinctrl: exynos: Generalize the eint16_31 demux code
pinctrl: samsung: Separate per-bank init and runtime data
pinctrl: samsung: Constify samsung_pin_ctrl struct
pinctrl: samsung: Constify samsung_pin_bank_type struct
pinctrl: samsung: Drop unused label field in samsung_pin_ctrl struct
pinctrl: samsung: Make samsung_pinctrl_get_soc_data use ERR_PTR()
pinctrl: Add Intel Cherryview/Braswell pin controller support
gpio / ACPI: Add knowledge about pin controllers to acpi_get_gpiod()
pinctrl: Fix path error in documentation
pinctrl: rockchip: save and restore gpio6_c6 pinmux in suspend/resume
pinctrl: rockchip: add suspend/resume functions
...
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The size of unsigned long varies between 32 and 64 bit systems while
the size of phandle arguments is always 32 bits per parameter.
On 64-bit systems, cooling devices registered via of-thermal apis fail
to bind when the min/max cooling state is specified as
THERMAL_NO_LIMIT (-1UL) as there is a mis-match between the value read
from the device tree (32bit) and the pre-processor define (64bit).
As we're unlikely to need cooling states larger than 32 bits, and for
consistency with the size of phandle arguments, explicitly limit
THERMAL_NO_LIMIT to 32 bits.
Reported-by: Hyungwoo Yang <hwoo.yang@gmail.com>
Acked-by: Zhang Rui <rui.zhang@intel.com>
Signed-off-by: Punit Agrawal <punit.agrawal@arm.com>
Signed-off-by: Eduardo Valentin <edubezval@gmail.com>
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David S. Miller
Michael Turquette
Stephen Boyd
Rajendra Nayak
Olof Johansson
Beniamino Galvani
Lukasz Majewski
Bjorn Andersson
Heiko Stuebner
Maxime Ripard
Oleksij Rempel
Tony Lindgren
Maxime COQUELIN
Padmavathi Venna
Sylwester Nawrocki
Geert Uytterhoeven
Sanchayan Maity
Huang Lin
Kever Yang
Roger Chen
Vivek Gautam
Tony K Nadackal
Andrey Gusakov
Zhang Rui
Shinobu Uehara
Koji Matsuoka
Hisashi Nakamura
Hiroyuki Yokoyama
Ryo Kataoka
Ulrich Hecht
Kazuya Mizuguchi
Linus Torvalds
Punit Agrawal