| Age | Commit message (Expand) | Author | Files | Lines |
|---|---|---|---|---|
| 2017-12-21 | bus: ti-sysc: Add parsing of module capabilities | 1 | -0/+10 | |
| 2017-12-21 | bus: ti-sysc: Handle module quirks based dts configuration | 1 | -0/+6 | |
| 2017-12-21 | bus: ti-sysc: Detect i2c interconnect target module based on register layout | 1 | -0/+1 | |
| 2017-12-21 | bus: ti-sysc: Add register bits for interconnect target modules | 1 | -0/+40 | |
| 2017-12-21 | bus: ti-sysc: Make omap_hwmod_sysc_fields into sysc_regbits platform data | 1 | -0/+29 |
