blob: 1c8afe2ffebc38710260a95cebbe13ae82f51330 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
|
/*
* Device Tree file for Marvell Armada XP development board
* (DB-MV784MP-GP)
*
* Copyright (C) 2013 Marvell
*
* Lior Amsalem <alior@marvell.com>
* Gregory CLEMENT <gregory.clement@free-electrons.com>
* Thomas Petazzoni <thomas.petazzoni@free-electrons.com>
*
* This file is licensed under the terms of the GNU General Public
* License version 2. This program is licensed "as is" without any
* warranty of any kind, whether express or implied.
*/
/dts-v1/;
/include/ "armada-xp-mv78460.dtsi"
/ {
model = "Marvell Armada XP Development Board DB-MV784MP-GP";
compatible = "marvell,axp-gp", "marvell,armadaxp-mv78460", "marvell,armadaxp", "marvell,armada-370-xp";
chosen {
bootargs = "console=ttyS0,115200 earlyprintk";
};
memory {
device_type = "memory";
/*
* 4 GB of plug-in RAM modules by default but only 3GB
* are visible, the amount of memory available can be
* changed by the bootloader according the size of the
* module actually plugged
*/
reg = <0x00000000 0xC0000000>;
};
soc {
serial@d0012000 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012100 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012200 {
clock-frequency = <250000000>;
status = "okay";
};
serial@d0012300 {
clock-frequency = <250000000>;
status = "okay";
};
sata@d00a0000 {
nr-ports = <2>;
status = "okay";
};
mdio {
phy0: ethernet-phy@0 {
reg = <16>;
};
phy1: ethernet-phy@1 {
reg = <17>;
};
phy2: ethernet-phy@2 {
reg = <18>;
};
phy3: ethernet-phy@3 {
reg = <19>;
};
};
ethernet@d0070000 {
status = "okay";
phy = <&phy0>;
phy-mode = "rgmii-id";
};
ethernet@d0074000 {
status = "okay";
phy = <&phy1>;
phy-mode = "rgmii-id";
};
ethernet@d0030000 {
status = "okay";
phy = <&phy2>;
phy-mode = "rgmii-id";
};
ethernet@d0034000 {
status = "okay";
phy = <&phy3>;
phy-mode = "rgmii-id";
};
spi0: spi@d0010600 {
status = "okay";
spi-flash@0 {
#address-cells = <1>;
#size-cells = <1>;
compatible = "n25q128a13";
reg = <0>; /* Chip select 0 */
spi-max-frequency = <108000000>;
};
};
};
};
|
