aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/imx28.dtsi
blob: 4634cb861a597d115b5f6dab784da3a616c81b01 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
/*
 * Copyright 2012 Freescale Semiconductor, Inc.
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&icoll>;

	aliases {
		gpio0 = &gpio0;
		gpio1 = &gpio1;
		gpio2 = &gpio2;
		gpio3 = &gpio3;
		gpio4 = &gpio4;
		saif0 = &saif0;
		saif1 = &saif1;
	};

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	apb@80000000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80000000 0x80000>;
		ranges;

		apbh@80000000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80000000 0x3c900>;
			ranges;

			icoll: interrupt-controller@80000000 {
				compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
				interrupt-controller;
				#interrupt-cells = <1>;
				reg = <0x80000000 0x2000>;
			};

			hsadc@80002000 {
				reg = <0x80002000 2000>;
				interrupts = <13 87>;
				status = "disabled";
			};

			dma-apbh@80004000 {
				compatible = "fsl,imx28-dma-apbh";
				reg = <0x80004000 2000>;
			};

			perfmon@80006000 {
				reg = <0x80006000 800>;
				interrupts = <27>;
				status = "disabled";
			};

			bch@8000a000 {
				reg = <0x8000a000 2000>;
				interrupts = <41>;
				status = "disabled";
			};

			gpmi@8000c000 {
				reg = <0x8000c000 2000>;
				interrupts = <42 88>;
				status = "disabled";
			};

			ssp0: ssp@80010000 {
				reg = <0x80010000 2000>;
				interrupts = <96 82>;
				fsl,ssp-dma-channel = <0>;
				status = "disabled";
			};

			ssp1: ssp@80012000 {
				reg = <0x80012000 2000>;
				interrupts = <97 83>;
				fsl,ssp-dma-channel = <1>;
				status = "disabled";
			};

			ssp2: ssp@80014000 {
				reg = <0x80014000 2000>;
				interrupts = <98 84>;
				fsl,ssp-dma-channel = <2>;
				status = "disabled";
			};

			ssp3: ssp@80016000 {
				reg = <0x80016000 2000>;
				interrupts = <99 85>;
				fsl,ssp-dma-channel = <3>;
				status = "disabled";
			};

			pinctrl@80018000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-pinctrl", "simple-bus";
				reg = <0x80018000 2000>;

				gpio0: gpio@0 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <127>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio1: gpio@1 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <126>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio2: gpio@2 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <125>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio3: gpio@3 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <124>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				gpio4: gpio@4 {
					compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
					interrupts = <123>;
					gpio-controller;
					#gpio-cells = <2>;
					interrupt-controller;
					#interrupt-cells = <2>;
				};

				duart_pins_a: duart@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x3102 0x3112>;
					fsl,drive-strength = <0>;
					fsl,voltage = <1>;
					fsl,pull-up = <0>;
				};

				mac0_pins_a: mac0@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x4000 0x4010 0x4020
						0x4030 0x4040 0x4060 0x4070
						0x4080 0x4100>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mac1_pins_a: mac1@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x40f1 0x4091 0x40a1
						0x40e1 0x40b1 0x40c1>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_8bit_pins_a: mmc0-8bit@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x2000 0x2010 0x2020
						0x2030 0x2040 0x2050 0x2060
						0x2070 0x2080 0x2090 0x20a0>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				mmc0_cd_cfg: mmc0-cd-cfg {
					fsl,pinmux-ids = <0x2090>;
					fsl,pull-up = <0>;
				};

				mmc0_sck_cfg: mmc0-sck-cfg {
					fsl,pinmux-ids = <0x20a0>;
					fsl,drive-strength = <2>;
					fsl,pull-up = <0>;
				};

				i2c0_pins_a: i2c0@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x3180 0x3190>;
					fsl,drive-strength = <1>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif0_pins_a: saif0@0 {
					reg = <0>;
					fsl,pinmux-ids =
						<0x3140 0x3150 0x3160 0x3170>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};

				saif1_pins_a: saif1@0 {
					reg = <0>;
					fsl,pinmux-ids = <0x31a0>;
					fsl,drive-strength = <2>;
					fsl,voltage = <1>;
					fsl,pull-up = <1>;
				};
			};

			digctl@8001c000 {
				reg = <0x8001c000 2000>;
				interrupts = <89>;
				status = "disabled";
			};

			etm@80022000 {
				reg = <0x80022000 2000>;
				status = "disabled";
			};

			dma-apbx@80024000 {
				compatible = "fsl,imx28-dma-apbx";
				reg = <0x80024000 2000>;
			};

			dcp@80028000 {
				reg = <0x80028000 2000>;
				interrupts = <52 53 54>;
				status = "disabled";
			};

			pxp@8002a000 {
				reg = <0x8002a000 2000>;
				interrupts = <39>;
				status = "disabled";
			};

			ocotp@8002c000 {
				reg = <0x8002c000 2000>;
				status = "disabled";
			};

			axi-ahb@8002e000 {
				reg = <0x8002e000 2000>;
				status = "disabled";
			};

			lcdif@80030000 {
				reg = <0x80030000 2000>;
				interrupts = <38 86>;
				status = "disabled";
			};

			can0: can@80032000 {
				reg = <0x80032000 2000>;
				interrupts = <8>;
				status = "disabled";
			};

			can1: can@80034000 {
				reg = <0x80034000 2000>;
				interrupts = <9>;
				status = "disabled";
			};

			simdbg@8003c000 {
				reg = <0x8003c000 200>;
				status = "disabled";
			};

			simgpmisel@8003c200 {
				reg = <0x8003c200 100>;
				status = "disabled";
			};

			simsspsel@8003c300 {
				reg = <0x8003c300 100>;
				status = "disabled";
			};

			simmemsel@8003c400 {
				reg = <0x8003c400 100>;
				status = "disabled";
			};

			gpiomon@8003c500 {
				reg = <0x8003c500 100>;
				status = "disabled";
			};

			simenet@8003c700 {
				reg = <0x8003c700 100>;
				status = "disabled";
			};

			armjtag@8003c800 {
				reg = <0x8003c800 100>;
				status = "disabled";
			};
                };

		apbx@80040000 {
			compatible = "simple-bus";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0x80040000 0x40000>;
			ranges;

			clkctl@80040000 {
				reg = <0x80040000 2000>;
				status = "disabled";
			};

			saif0: saif@80042000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80042000 2000>;
				interrupts = <59 80>;
				fsl,saif-dma-channel = <4>;
				status = "disabled";
			};

			power@80044000 {
				reg = <0x80044000 2000>;
				status = "disabled";
			};

			saif1: saif@80046000 {
				compatible = "fsl,imx28-saif";
				reg = <0x80046000 2000>;
				interrupts = <58 81>;
				fsl,saif-dma-channel = <5>;
				status = "disabled";
			};

			lradc@80050000 {
				reg = <0x80050000 2000>;
				status = "disabled";
			};

			spdif@80054000 {
				reg = <0x80054000 2000>;
				interrupts = <45 66>;
				status = "disabled";
			};

			rtc@80056000 {
				reg = <0x80056000 2000>;
				interrupts = <28 29>;
				status = "disabled";
			};

			i2c0: i2c@80058000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x80058000 2000>;
				interrupts = <111 68>;
				status = "disabled";
			};

			i2c1: i2c@8005a000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "fsl,imx28-i2c";
				reg = <0x8005a000 2000>;
				interrupts = <110 69>;
				status = "disabled";
			};

			pwm@80064000 {
				reg = <0x80064000 2000>;
				status = "disabled";
			};

			timrot@80068000 {
				reg = <0x80068000 2000>;
				status = "disabled";
			};

			auart0: serial@8006a000 {
				reg = <0x8006a000 0x2000>;
				interrupts = <112 70 71>;
				status = "disabled";
			};

			auart1: serial@8006c000 {
				reg = <0x8006c000 0x2000>;
				interrupts = <113 72 73>;
				status = "disabled";
			};

			auart2: serial@8006e000 {
				reg = <0x8006e000 0x2000>;
				interrupts = <114 74 75>;
				status = "disabled";
			};

			auart3: serial@80070000 {
				reg = <0x80070000 0x2000>;
				interrupts = <115 76 77>;
				status = "disabled";
			};

			auart4: serial@80072000 {
				reg = <0x80072000 0x2000>;
				interrupts = <116 78 79>;
				status = "disabled";
			};

			duart: serial@80074000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0x80074000 0x1000>;
				interrupts = <47>;
				status = "disabled";
			};

			usbphy0: usbphy@8007c000 {
				reg = <0x8007c000 0x2000>;
				status = "disabled";
			};

			usbphy1: usbphy@8007e000 {
				reg = <0x8007e000 0x2000>;
				status = "disabled";
			};
		};
	};

	ahb@80080000 {
		compatible = "simple-bus";
		#address-cells = <1>;
		#size-cells = <1>;
		reg = <0x80080000 0x80000>;
		ranges;

		usbctrl0: usbctrl@80080000 {
			reg = <0x80080000 0x10000>;
			status = "disabled";
		};

		usbctrl1: usbctrl@80090000 {
			reg = <0x80090000 0x10000>;
			status = "disabled";
		};

		dflpt@800c0000 {
			reg = <0x800c0000 0x10000>;
			status = "disabled";
		};

		mac0: ethernet@800f0000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f0000 0x4000>;
			interrupts = <101>;
			status = "disabled";
		};

		mac1: ethernet@800f4000 {
			compatible = "fsl,imx28-fec";
			reg = <0x800f4000 0x4000>;
			interrupts = <102>;
			status = "disabled";
		};

		switch@800f8000 {
			reg = <0x800f8000 0x8000>;
			status = "disabled";
		};

	};
};