aboutsummaryrefslogtreecommitdiffstats
path: root/arch/arm/boot/dts/spear3xx.dtsi
blob: c2a852d43c4895fe543b0849f9580d594bca4531 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
/*
 * DTS file for all SPEAr3xx SoCs
 *
 * Copyright 2012 Viresh Kumar <viresh.linux@gmail.com>
 *
 * The code contained herein is licensed under the GNU General Public
 * License. You may obtain a copy of the GNU General Public License
 * Version 2 or later at the following locations:
 *
 * http://www.opensource.org/licenses/gpl-license.html
 * http://www.gnu.org/copyleft/gpl.html
 */

/include/ "skeleton.dtsi"

/ {
	interrupt-parent = <&vic>;

	cpus {
		cpu@0 {
			compatible = "arm,arm926ejs";
		};
	};

	memory {
		device_type = "memory";
		reg = <0 0x40000000>;
	};

	ahb {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "simple-bus";
		ranges = <0xd0000000 0xd0000000 0x30000000>;

		vic: interrupt-controller@f1100000 {
			compatible = "arm,pl190-vic";
			interrupt-controller;
			reg = <0xf1100000 0x1000>;
			#interrupt-cells = <1>;
		};

		dma@fc400000 {
			compatible = "arm,pl080", "arm,primecell";
			reg = <0xfc400000 0x1000>;
			interrupt-parent = <&vic>;
			interrupts = <8>;
			status = "disabled";
		};

		gmac: eth@e0800000 {
			compatible = "st,spear600-gmac";
			reg = <0xe0800000 0x8000>;
			interrupts = <23 22>;
			interrupt-names = "macirq", "eth_wake_irq";
			phy-mode = "mii";
			status = "disabled";
		};

		smi: flash@fc000000 {
			compatible = "st,spear600-smi";
			#address-cells = <1>;
			#size-cells = <1>;
			reg = <0xfc000000 0x1000>;
			interrupts = <9>;
			status = "disabled";
		};

		spi0: spi@d0100000 {
			compatible = "arm,pl022", "arm,primecell";
			reg = <0xd0100000 0x1000>;
			interrupts = <20>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";
		};

		ehci@e1800000 {
			compatible = "st,spear600-ehci", "usb-ehci";
			reg = <0xe1800000 0x1000>;
			interrupts = <26>;
			status = "disabled";
		};

		ohci@e1900000 {
			compatible = "st,spear600-ohci", "usb-ohci";
			reg = <0xe1900000 0x1000>;
			interrupts = <25>;
			status = "disabled";
		};

		ohci@e2100000 {
			compatible = "st,spear600-ohci", "usb-ohci";
			reg = <0xe2100000 0x1000>;
			interrupts = <27>;
			status = "disabled";
		};

		apb {
			#address-cells = <1>;
			#size-cells = <1>;
			compatible = "simple-bus";
			ranges = <0xd0000000 0xd0000000 0x30000000>;

			gpio0: gpio@fc980000 {
				compatible = "arm,pl061", "arm,primecell";
				reg = <0xfc980000 0x1000>;
				interrupts = <11>;
				gpio-controller;
				#gpio-cells = <2>;
				interrupt-controller;
				#interrupt-cells = <2>;
				status = "disabled";
			};

			i2c0: i2c@d0180000 {
				#address-cells = <1>;
				#size-cells = <0>;
				compatible = "snps,designware-i2c";
				reg = <0xd0180000 0x1000>;
				interrupts = <21>;
				status = "disabled";
			};

			rtc@fc900000 {
				compatible = "st,spear600-rtc";
				reg = <0xfc900000 0x1000>;
				interrupts = <10>;
				status = "disabled";
			};

			serial@d0000000 {
				compatible = "arm,pl011", "arm,primecell";
				reg = <0xd0000000 0x1000>;
				interrupts = <19>;
				status = "disabled";
			};

			wdt@fc880000 {
				compatible = "arm,sp805", "arm,primecell";
				reg = <0xfc880000 0x1000>;
				interrupts = <12>;
				status = "disabled";
			};

			timer@f0000000 {
				compatible = "st,spear-timer";
				reg = <0xf0000000 0x400>;
				interrupts = <2>;
			};
		};
	};
};