aboutsummaryrefslogtreecommitdiffstats
path: root/arch/mips/sibyte/Kconfig
blob: e8fb880272bd143ba42b8cec34a037f016771135 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
config SIBYTE_SB1250
	bool
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_ENABLE_LDT_IF_PCI
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC
	select SYS_SUPPORTS_SMP

config SIBYTE_BCM1120
	bool
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM1125
	bool
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM1125H
	bool
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_BCM112X
	select SIBYTE_ENABLE_LDT_IF_PCI
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC

config SIBYTE_BCM112X
	bool
	select IRQ_CPU
	select SIBYTE_SB1xxx_SOC
	select SIBYTE_HAS_ZBUS_PROFILING

config SIBYTE_BCM1x80
	bool
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_HAS_ZBUS_PROFILING
	select SIBYTE_SB1xxx_SOC
	select SYS_SUPPORTS_SMP

config SIBYTE_BCM1x55
	bool
	select HW_HAS_PCI
	select IRQ_CPU
	select SIBYTE_SB1xxx_SOC
	select SIBYTE_HAS_ZBUS_PROFILING
	select SYS_SUPPORTS_SMP

config SIBYTE_SB1xxx_SOC
	bool
	select DMA_COHERENT
	select IRQ_CPU
	select SIBYTE_CFE
	select SWAP_IO_SPACE
	select SYS_SUPPORTS_32BIT_KERNEL
	select SYS_SUPPORTS_64BIT_KERNEL

choice
	prompt "SiByte SOC Stepping"
	depends on SIBYTE_SB1xxx_SOC

config CPU_SB1_PASS_1
	bool "1250 Pass1"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH

config CPU_SB1_PASS_2_1250
	bool "1250 An"
	depends on SIBYTE_SB1250
	select CPU_SB1_PASS_2
	help
	  Also called BCM1250 Pass 2

config CPU_SB1_PASS_2_2
	bool "1250 Bn"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH
	help
	  Also called BCM1250 Pass 2.2

config CPU_SB1_PASS_4
	bool "1250 Cn"
	depends on SIBYTE_SB1250
	select CPU_HAS_PREFETCH
	help
	  Also called BCM1250 Pass 3

config CPU_SB1_PASS_2_112x
	bool "112x Hybrid"
	depends on SIBYTE_BCM112X
	select CPU_SB1_PASS_2

config CPU_SB1_PASS_3
	bool "112x An"
	depends on SIBYTE_BCM112X
	select CPU_HAS_PREFETCH

endchoice

config CPU_SB1_PASS_2
	bool

config SIBYTE_HAS_LDT
	bool

config SIBYTE_ENABLE_LDT_IF_PCI
	bool
	select SIBYTE_HAS_LDT if PCI

config SIMULATION
	bool "Running under simulation"
	depends on SIBYTE_SB1xxx_SOC
	help
	  Build a kernel suitable for running under the GDB simulator.
	  Primarily adjusts the kernel's notion of time.

config SB1_CEX_ALWAYS_FATAL
	bool "All cache exceptions considered fatal (no recovery attempted)"
	depends on SIBYTE_SB1xxx_SOC

config SB1_CERR_STALL
	bool "Stall (rather than panic) on fatal cache error"
	depends on SIBYTE_SB1xxx_SOC

config SIBYTE_CFE
	bool "Booting from CFE"
	depends on SIBYTE_SB1xxx_SOC
	select CFE
	select SYS_HAS_EARLY_PRINTK
	help
	  Make use of the CFE API for enumerating available memory,
	  controlling secondary CPUs, and possibly console output.

config SIBYTE_CFE_CONSOLE
	bool "Use firmware console"
	depends on SIBYTE_CFE
	help
	  Use the CFE API's console write routines during boot.  Other console
	  options (VT console, sb1250 duart console, etc.) should not be
	  configured.

config SIBYTE_STANDALONE
	bool
	depends on SIBYTE_SB1xxx_SOC && !SIBYTE_CFE
	select SYS_HAS_EARLY_PRINTK
	default y

config SIBYTE_STANDALONE_RAM_SIZE
	int "Memory size (in megabytes)"
	depends on SIBYTE_STANDALONE
	default "32"

config SIBYTE_BUS_WATCHER
	bool "Support for Bus Watcher statistics"
	depends on SIBYTE_SB1xxx_SOC
	help
	  Handle and keep statistics on the bus error interrupts (COR_ECC,
	  BAD_ECC, IO_BUS).

config SIBYTE_BW_TRACE
	bool "Capture bus trace before bus error"
	depends on SIBYTE_BUS_WATCHER
	help
	  Run a continuous bus trace, dumping the raw data as soon as
	  a ZBbus error is detected.  Cannot work if ZBbus profiling
	  is turned on, and also will interfere with JTAG-based trace
	  buffer activity.  Raw buffer data is dumped to console, and
	  must be processed off-line.

config SIBYTE_TBPROF
	tristate "Support for ZBbus profiling"
	depends on SIBYTE_HAS_ZBUS_PROFILING

config SIBYTE_HAS_ZBUS_PROFILING
	bool