aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/mpc5121ads.dts
blob: 1f9036c317b4ab235e9264705ee38fdd1e2c5d14 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
/*
 * MPC5121E ADS Device Tree Source
 *
 * Copyright 2007,2008 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
 */

/dts-v1/;

/ {
	model = "mpc5121ads";
	compatible = "fsl,mpc5121ads";
	#address-cells = <1>;
	#size-cells = <1>;

	aliases {
		pci = &pci;
	};

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		PowerPC,5121@0 {
			device_type = "cpu";
			reg = <0>;
			d-cache-line-size = <0x20>;	// 32 bytes
			i-cache-line-size = <0x20>;	// 32 bytes
			d-cache-size = <0x8000>;	// L1, 32K
			i-cache-size = <0x8000>;	// L1, 32K
			timebase-frequency = <49500000>;// 49.5 MHz (csb/4)
			bus-frequency = <198000000>;	// 198 MHz csb bus
			clock-frequency = <396000000>;	// 396 MHz ppc core
		};
	};

	memory {
		device_type = "memory";
		reg = <0x00000000 0x10000000>;	// 256MB at 0
	};

	mbx@20000000 {
		compatible = "fsl,mpc5121-mbx";
		reg = <0x20000000 0x4000>;
		interrupts = <66 0x8>;
		interrupt-parent = < &ipic >;
	};

	sram@30000000 {
		compatible = "fsl,mpc5121-sram";
		reg = <0x30000000 0x20000>;		// 128K at 0x30000000
	};

	nfc@40000000 {
		compatible = "fsl,mpc5121-nfc";
		reg = <0x40000000 0x100000>;	// 1M at 0x40000000
		interrupts = <6 8>;
		interrupt-parent = < &ipic >;
		#address-cells = <1>;
		#size-cells = <1>;
		bank-width = <1>;
		// ADS has two Hynix 512MB Nand flash chips in a single
		// stacked package .
		chips = <2>;
		nand0@0 {
			label = "nand0";
			reg = <0x00000000 0x02000000>; 	// first 32 MB of chip 0
		};
		nand1@20000000 {
			label = "nand1";
			reg = <0x20000000 0x02000000>; 	// first 32 MB of chip 1
		};
	};

	localbus@80000020 {
		compatible = "fsl,mpc5121-localbus";
		#address-cells = <2>;
		#size-cells = <1>;
		reg = <0x80000020 0x40>;

		ranges = <0x0 0x0 0xfc000000 0x04000000
			  0x2 0x0 0x82000000 0x00008000>;

		flash@0,0 {
			compatible = "cfi-flash";
			reg = <0 0x0 0x4000000>;
			#address-cells = <1>;
			#size-cells = <1>;
			bank-width = <4>;
			device-width = <2>;
			protected@0 {
				label = "protected";
				reg = <0x00000000 0x00040000>;  // first sector is protected
				read-only;
			};
			filesystem@40000 {
				label = "filesystem";
				reg = <0x00040000 0x03c00000>;  // 60M for filesystem
			};
			kernel@3c40000 {
				label = "kernel";
				reg = <0x03c40000 0x00280000>;  // 2.5M for kernel
			};
			device-tree@3ec0000 {
				label = "device-tree";
				reg = <0x03ec0000 0x00040000>;  // one sector for device tree
			};
			u-boot@3f00000 {
				label = "u-boot";
				reg = <0x03f00000 0x00100000>;  // 1M for u-boot
				read-only;
			};
		};

		board-control@2,0 {
			compatible = "fsl,mpc5121ads-cpld";
			reg = <0x2 0x0 0x8000>;
		};

		cpld_pic: pic@2,a {
			compatible = "fsl,mpc5121ads-cpld-pic";
			interrupt-controller;
			#interrupt-cells = <2>;
			reg = <0x2 0xa 0x5>;
			interrupt-parent = < &ipic >;
			// irq routing
			//	all irqs but touch screen are routed to irq0 (ipic 48)
			//	touch screen is statically routed to irq1 (ipic 17)
			//	so don't use it here
			interrupts = <48 0x8>;
		};
	};

	soc@80000000 {
		compatible = "fsl,mpc5121-immr";
		#address-cells = <1>;
		#size-cells = <1>;
		#interrupt-cells = <2>;
		ranges = <0x0 0x80000000 0x400000>;
		reg = <0x80000000 0x400000>;
		bus-frequency = <66000000>;	// 66 MHz ips bus


		// IPIC
		// interrupts cell = <intr #, sense>
		// sense values match linux IORESOURCE_IRQ_* defines:
		// sense == 8: Level, low assertion
		// sense == 2: Edge, high-to-low change
		//
		ipic: interrupt-controller@c00 {
			compatible = "fsl,mpc5121-ipic", "fsl,ipic";
			interrupt-controller;
			#address-cells = <0>;
			#interrupt-cells = <2>;
			reg = <0xc00 0x100>;
		};

		rtc@a00 {	// Real time clock
			compatible = "fsl,mpc5121-rtc";
			reg = <0xa00 0x100>;
			interrupts = <79 0x8 80 0x8>;
			interrupt-parent = < &ipic >;
		};

		clock@f00 {	// Clock control
			compatible = "fsl,mpc5121-clock";
			reg = <0xf00 0x100>;
		};

		pmc@1000{  //Power Management Controller
			compatible = "fsl,mpc5121-pmc";
			reg = <0x1000 0x100>;
			interrupts = <83 0x2>;
			interrupt-parent = < &ipic >;
		};

		gpio@1100 {
			compatible = "fsl,mpc5121-gpio";
			reg = <0x1100 0x100>;
			interrupts = <78 0x8>;
			interrupt-parent = < &ipic >;
		};

		mscan@1300 {
			compatible = "fsl,mpc5121-mscan";
			cell-index = <0>;
			interrupts = <12 0x8>;
			interrupt-parent = < &ipic >;
			reg = <0x1300 0x80>;
		};

		mscan@1380 {
			compatible = "fsl,mpc5121-mscan";
			cell-index = <1>;
			interrupts = <13 0x8>;
			interrupt-parent = < &ipic >;
			reg = <0x1380 0x80>;
		};

		i2c@1700 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";
			cell-index = <0>;
			reg = <0x1700 0x20>;
			interrupts = <9 0x8>;
			interrupt-parent = < &ipic >;
			fsl5200-clocking;
		};

		i2c@1720 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";
			cell-index = <1>;
			reg = <0x1720 0x20>;
			interrupts = <10 0x8>;
			interrupt-parent = < &ipic >;
			fsl5200-clocking;
		};

		i2c@1740 {
			#address-cells = <1>;
			#size-cells = <0>;
			compatible = "fsl,mpc5121-i2c", "fsl-i2c";
			cell-index = <2>;
			reg = <0x1740 0x20>;
			interrupts = <11 0x8>;
			interrupt-parent = < &ipic >;
			fsl5200-clocking;
		};

		i2ccontrol@1760 {
			compatible = "fsl,mpc5121-i2c-ctrl";
			reg = <0x1760 0x8>;
		};

		axe@2000 {
			compatible = "fsl,mpc5121-axe";
			reg = <0x2000 0x100>;
			interrupts = <42 0x8>;
			interrupt-parent = < &ipic >;
		};

		display@2100 {
			compatible = "fsl,mpc5121-diu", "fsl-diu";
			reg = <0x2100 0x100>;
			interrupts = <64 0x8>;
			interrupt-parent = < &ipic >;
		};

		mdio@2800 {
			compatible = "fsl,mpc5121-fec-mdio";
			reg = <0x2800 0x800>;
			#address-cells = <1>;
			#size-cells = <0>;
			phy: ethernet-phy@0 {
				reg = <1>;
				device_type = "ethernet-phy";
			};
		};

		ethernet@2800 {
			device_type = "network";
			compatible = "fsl,mpc5121-fec";
			reg = <0x2800 0x800>;
			local-mac-address = [ 00 00 00 00 00 00 ];
			interrupts = <4 0x8>;
			interrupt-parent = < &ipic >;
			phy-handle = < &phy >;
			fsl,align-tx-packets = <4>;
		};

		// 5121e has two dr usb modules
		// mpc5121_ads only uses USB0

		// USB1 using external ULPI PHY
		//usb@3000 {
		//	compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
		//	reg = <0x3000 0x1000>;
		//	#address-cells = <1>;
		//	#size-cells = <0>;
		//	interrupt-parent = < &ipic >;
		//	interrupts = <43 0x8>;
		//	dr_mode = "otg";
		//	phy_type = "ulpi";
		//	port1;
		//};

		// USB0 using internal UTMI PHY
		usb@4000 {
			compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
			reg = <0x4000 0x1000>;
			#address-cells = <1>;
			#size-cells = <0>;
			interrupt-parent = < &ipic >;
			interrupts = <44 0x8>;
			dr_mode = "otg";
			phy_type = "utmi_wide";
			port0;
		};

		// IO control
		ioctl@a000 {
			compatible = "fsl,mpc5121-ioctl";
			reg = <0xA000 0x1000>;
		};

		pata@10200 {
			compatible = "fsl,mpc5121-pata";
			reg = <0x10200 0x100>;
			interrupts = <5 0x8>;
			interrupt-parent = < &ipic >;
		};

		// 512x PSCs are not 52xx PSC compatible
		// PSC3 serial port A aka ttyPSC0
		serial@11300 {
			device_type = "serial";
			compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
			// Logical port assignment needed until driver
			// learns to use aliases
			port-number = <0>;
			cell-index = <3>;
			reg = <0x11300 0x100>;
			interrupts = <40 0x8>;
			interrupt-parent = < &ipic >;
			rx-fifo-size = <16>;
			tx-fifo-size = <16>;
		};

		// PSC4 serial port B aka ttyPSC1
		serial@11400 {
			device_type = "serial";
			compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
			// Logical port assignment needed until driver
			// learns to use aliases
			port-number = <1>;
			cell-index = <4>;
			reg = <0x11400 0x100>;
			interrupts = <40 0x8>;
			interrupt-parent = < &ipic >;
			rx-fifo-size = <16>;
			tx-fifo-size = <16>;
		};

		// PSC5 in ac97 mode
		ac97@11500 {
			compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
			cell-index = <5>;
			reg = <0x11500 0x100>;
			interrupts = <40 0x8>;
			interrupt-parent = < &ipic >;
			fsl,mode = "ac97-slave";
			rx-fifo-size = <384>;
			tx-fifo-size = <384>;
		};

		pscfifo@11f00 {
			compatible = "fsl,mpc5121-psc-fifo";
			reg = <0x11f00 0x100>;
			interrupts = <40 0x8>;
			interrupt-parent = < &ipic >;
		};

		dma@14000 {
			compatible = "fsl,mpc5121-dma2";
			reg = <0x14000 0x1800>;
			interrupts = <65 0x8>;
			interrupt-parent = < &ipic >;
		};

	};

	pci: pci@80008500 {
		interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
		interrupt-map = <
				// IDSEL 0x15 - Slot 1 PCI
				 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
				 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
				 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
				 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8

				// IDSEL 0x16 - Slot 2 MiniPCI
				 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
				 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8

				// IDSEL 0x17 - Slot 3 MiniPCI
				 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
				 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
				>;
		interrupt-parent = < &ipic >;
		interrupts = <1 0x8>;
		bus-range = <0 0>;
		ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
			  0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
			  0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
		clock-frequency = <0>;
		#interrupt-cells = <1>;
		#size-cells = <2>;
		#address-cells = <3>;
		reg = <0x80008500 0x100>;
		compatible = "fsl,mpc5121-pci";
		device_type = "pci";
	};
};