aboutsummaryrefslogtreecommitdiffstats
path: root/arch/powerpc/boot/dts/p2020ds.dtsi
blob: e699cf95b06342b94d8609f1b68c6511cf63505f (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
/*
 * P2020DS Device Tree Source stub (no addresses or top-level ranges)
 *
 * Copyright 2011-2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
 *     * Redistributions of source code must retain the above copyright
 *       notice, this list of conditions and the following disclaimer.
 *     * Redistributions in binary form must reproduce the above copyright
 *       notice, this list of conditions and the following disclaimer in the
 *       documentation and/or other materials provided with the distribution.
 *     * Neither the name of Freescale Semiconductor nor the
 *       names of its contributors may be used to endorse or promote products
 *       derived from this software without specific prior written permission.
 *
 *
 * ALTERNATIVELY, this software may be distributed under the terms of the
 * GNU General Public License ("GPL") as published by the Free Software
 * Foundation, either version 2 of that License or (at your option) any
 * later version.
 *
 * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
 * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
 * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
 * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */

&board_lbc {
	nor@0,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "cfi-flash";
		reg = <0x0 0x0 0x8000000>;
		bank-width = <2>;
		device-width = <1>;

		ramdisk@0 {
			reg = <0x0 0x03000000>;
			read-only;
		};

		diagnostic@3000000 {
			reg = <0x03000000 0x00e00000>;
			read-only;
		};

		dink@3e00000 {
			reg = <0x03e00000 0x00200000>;
			read-only;
		};

		kernel@4000000 {
			reg = <0x04000000 0x00400000>;
			read-only;
		};

		jffs2@4400000 {
			reg = <0x04400000 0x03b00000>;
		};

		dtb@7f00000 {
			reg = <0x07f00000 0x00080000>;
			read-only;
		};

		u-boot@7f80000 {
			reg = <0x07f80000 0x00080000>;
			read-only;
		};
	};

	nand@2,0 {
		#address-cells = <1>;
		#size-cells = <1>;
		compatible = "fsl,elbc-fcm-nand";
		reg = <0x2 0x0 0x40000>;

		u-boot@0 {
			reg = <0x0 0x02000000>;
			read-only;
		};

		jffs2@2000000 {
			reg = <0x02000000 0x10000000>;
		};

		ramdisk@12000000 {
			reg = <0x12000000 0x08000000>;
			read-only;
		};

		kernel@1a000000 {
			reg = <0x1a000000 0x04000000>;
		};

		dtb@1e000000 {
			reg = <0x1e000000 0x01000000>;
			read-only;
		};

		empty@1f000000 {
			reg = <0x1f000000 0x21000000>;
		};
	};

	board-control@3,0 {
		compatible = "fsl,p2020ds-fpga", "fsl,fpga-ngpixis";
		reg = <0x3 0x0 0x30>;
	};

	nand@4,0 {
		compatible = "fsl,elbc-fcm-nand";
		reg = <0x4 0x0 0x40000>;
	};

	nand@5,0 {
		compatible = "fsl,elbc-fcm-nand";
		reg = <0x5 0x0 0x40000>;
	};

	nand@6,0 {
		compatible = "fsl,elbc-fcm-nand";
		reg = <0x6 0x0 0x40000>;
	};
};

&board_soc {
	usb@22000 {
		phy_type = "ulpi";
		dr_mode = "host";
	};

	mdio@24520 {
		phy0: ethernet-phy@0 {
			interrupts = <3 1 0 0>;
			reg = <0x0>;
		};
		phy1: ethernet-phy@1 {
			interrupts = <3 1 0 0>;
			reg = <0x1>;
		};
		phy2: ethernet-phy@2 {
			interrupts = <3 1 0 0>;
			reg = <0x2>;
		};

		sgmii_phy1: sgmii-phy@1 {
			interrupts = <5 1 0 0>;
			reg = <0x1c>;
		};
		sgmii_phy2: sgmii-phy@2 {
			interrupts = <5 1 0 0>;
			reg = <0x1d>;
		};

		tbi0: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};

	};

	mdio@25520 {
		tbi1: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};
	};

	mdio@26520 {
		tbi2: tbi-phy@11 {
			reg = <0x11>;
			device_type = "tbi-phy";
		};

	};

	ptp_clock@24e00 {
		fsl,tclk-period = <5>;
		fsl,tmr-prsc = <200>;
		fsl,tmr-add = <0xCCCCCCCD>;
		fsl,tmr-fiper1 = <0x3B9AC9FB>;
		fsl,tmr-fiper2 = <0x0001869B>;
		fsl,max-adj = <249999999>;
	};

	enet0: ethernet@24000 {
		tbi-handle = <&tbi0>;
		phy-handle = <&phy0>;
		phy-connection-type = "rgmii-id";
	};

	enet1: ethernet@25000 {
		tbi-handle = <&tbi1>;
		phy-handle = <&phy1>;
		phy-connection-type = "rgmii-id";

	};

	enet2: ethernet@26000 {
		tbi-handle = <&tbi2>;
		phy-handle = <&phy2>;
		phy-connection-type = "rgmii-id";
	};
};

&board_pci1 {
	pcie@0 {
		interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
		interrupt-map = <

			// IDSEL 0x11 func 0 - PCI slot 1
			0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8800 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 1 - PCI slot 1
			0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8900 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 2 - PCI slot 1
			0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 3 - PCI slot 1
			0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 4 - PCI slot 1
			0x8c00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8c00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 5 - PCI slot 1
			0x8d00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8d00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 6 - PCI slot 1
			0x8e00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8e00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x11 func 7 - PCI slot 1
			0x8f00 0x0 0x0 0x1 &i8259 0x9 0x2
			0x8f00 0x0 0x0 0x2 &i8259 0xa 0x2

			// IDSEL 0x1d  Audio
			0xe800 0x0 0x0 0x1 &i8259 0x6 0x2

			// IDSEL 0x1e Legacy
			0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
			0xf100 0x0 0x0 0x1 &i8259 0x7 0x2

			// IDSEL 0x1f IDE/SATA
			0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
			0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
			>;

		uli1575@0 {
			reg = <0x0 0x0 0x0 0x0 0x0>;
			#size-cells = <2>;
			#address-cells = <3>;
			ranges = <0x2000000 0x0 0xa0000000
				  0x2000000 0x0 0xa0000000
				  0x0 0x20000000

				  0x1000000 0x0 0x0
				  0x1000000 0x0 0x0
				  0x0 0x10000>;
			isa@1e {
				device_type = "isa";
				#interrupt-cells = <2>;
				#size-cells = <1>;
				#address-cells = <2>;
				reg = <0xf000 0x0 0x0 0x0 0x0>;
				ranges = <0x1 0x0 0x1000000 0x0 0x0
					  0x1000>;
				interrupt-parent = <&i8259>;

				i8259: interrupt-controller@20 {
					reg = <0x1 0x20 0x2
					       0x1 0xa0 0x2
					       0x1 0x4d0 0x2>;
					interrupt-controller;
					device_type = "interrupt-controller";
					#address-cells = <0>;
					#interrupt-cells = <2>;
					compatible = "chrp,iic";
					interrupts = <4 1 0 0>;
					interrupt-parent = <&mpic>;
				};

				i8042@60 {
					#size-cells = <0>;
					#address-cells = <1>;
					reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
					interrupts = <1 3 12 3>;
					interrupt-parent =
						<&i8259>;

					keyboard@0 {
						reg = <0x0>;
						compatible = "pnpPNP,303";
					};

					mouse@1 {
						reg = <0x1>;
						compatible = "pnpPNP,f03";
					};
				};

				rtc@70 {
					compatible = "pnpPNP,b00";
					reg = <0x1 0x70 0x2>;
				};

				gpio@400 {
					reg = <0x1 0x400 0x80>;
				};
			};
		};
	};
};