blob: 9269e30e4ca0e75efcf476910809c9508a5b0698 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
|
#ifndef _POWERNV_H
#define _POWERNV_H
#ifdef CONFIG_SMP
extern void pnv_smp_init(void);
#else
static inline void pnv_smp_init(void) { }
#endif
struct pci_dev;
#ifdef CONFIG_PCI
extern void pnv_pci_init(void);
extern void pnv_pci_shutdown(void);
extern u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev);
#else
static inline void pnv_pci_init(void) { }
static inline void pnv_pci_shutdown(void) { }
static inline u64 pnv_pci_dma_get_required_mask(struct pci_dev *pdev)
{
return 0;
}
#endif
extern u32 pnv_get_supported_cpuidle_states(void);
extern void pnv_lpc_init(void);
extern void opal_handle_events(uint64_t events);
extern void opal_event_shutdown(void);
bool cpu_core_split_required(void);
#endif /* _POWERNV_H */
|
