blob: a309ec19077747dc746592ddbda4b7c33679b8f0 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
|
/*
* platform/hardware.h
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file "COPYING" in the main directory of this archive
* for more details.
*
* Copyright (C) 2001 Tensilica Inc.
*/
/*
* This file contains the hardware configuration of the XT2000 board.
*/
#ifndef _XTENSA_XT2000_HARDWARE_H
#define _XTENSA_XT2000_HARDWARE_H
#include <variant/core.h>
/*
* Number of platform IRQs
*/
#define PLATFORM_NR_IRQS 3
/*
* On-board components.
*/
#define SONIC83934_INTNUM XCHAL_EXTINT3_NUM
#define SONIC83934_ADDR IOADDR(0x0d030000)
/*
* V3-PCI
*/
/* The XT2000 uses the V3 as a cascaded interrupt controller for the PCI bus */
#define IRQ_PCI_A (XCHAL_NUM_INTERRUPTS + 0)
#define IRQ_PCI_B (XCHAL_NUM_INTERRUPTS + 1)
#define IRQ_PCI_C (XCHAL_NUM_INTERRUPTS + 2)
/*
* Various other components.
*/
#define XT2000_LED_ADDR IOADDR(0x0d040000)
#endif /* _XTENSA_XT2000_HARDWARE_H */
|
