blob: e9481c5ef1a57a8bdd3389540bed4828b956aa32 (
plain) (
blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
|
/* SPDX-License-Identifier: MIT */
/*
* Copyright © 2022 Intel Corporation
*/
#ifndef __INTEL_DISPLAY_CORE_H__
#define __INTEL_DISPLAY_CORE_H__
#include <linux/types.h>
struct intel_atomic_state;
struct intel_cdclk_funcs;
struct intel_crtc;
struct intel_crtc_state;
struct intel_dpll_funcs;
struct intel_hotplug_funcs;
struct intel_initial_plane_config;
struct intel_display_funcs {
/*
* Returns the active state of the crtc, and if the crtc is active,
* fills out the pipe-config with the hw state.
*/
bool (*get_pipe_config)(struct intel_crtc *,
struct intel_crtc_state *);
void (*get_initial_plane_config)(struct intel_crtc *,
struct intel_initial_plane_config *);
void (*crtc_enable)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void (*crtc_disable)(struct intel_atomic_state *state,
struct intel_crtc *crtc);
void (*commit_modeset_enables)(struct intel_atomic_state *state);
};
struct intel_display {
/* Display functions */
struct {
/* Top level crtc-ish functions */
const struct intel_display_funcs *display;
/* Display CDCLK functions */
const struct intel_cdclk_funcs *cdclk;
/* Display pll funcs */
const struct intel_dpll_funcs *dpll;
/* irq display functions */
const struct intel_hotplug_funcs *hotplug;
} funcs;
};
#endif /* __INTEL_DISPLAY_CORE_H__ */
|