aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/mtd/chips/jedec_probe.c
blob: b229da8060dd70dfa2cbd1b96ad0c9bb08b3f0a0 (plain) (blame)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
782
783
784
785
786
787
788
789
790
791
792
793
794
795
796
797
798
799
800
801
802
803
804
805
806
807
808
809
810
811
812
813
814
815
816
817
818
819
820
821
822
823
824
825
826
827
828
829
830
831
832
833
834
835
836
837
838
839
840
841
842
843
844
845
846
847
848
849
850
851
852
853
854
855
856
857
858
859
860
861
862
863
864
865
866
867
868
869
870
871
872
873
874
875
876
877
878
879
880
881
882
883
884
885
886
887
888
889
890
891
892
893
894
895
896
897
898
899
900
901
902
903
904
905
906
907
908
909
910
911
912
913
914
915
916
917
918
919
920
921
922
923
924
925
926
927
928
929
930
931
932
933
934
935
936
937
938
939
940
941
942
943
944
945
946
947
948
949
950
951
952
953
954
955
956
957
958
959
960
961
962
963
964
965
966
967
968
969
970
971
972
973
974
975
976
977
978
979
980
981
982
983
984
985
986
987
988
989
990
991
992
993
994
995
996
997
998
999
1000
1001
1002
1003
1004
1005
1006
1007
1008
1009
1010
1011
1012
1013
1014
1015
1016
1017
1018
1019
1020
1021
1022
1023
1024
1025
1026
1027
1028
1029
1030
1031
1032
1033
1034
1035
1036
1037
1038
1039
1040
1041
1042
1043
1044
1045
1046
1047
1048
1049
1050
1051
1052
1053
1054
1055
1056
1057
1058
1059
1060
1061
1062
1063
1064
1065
1066
1067
1068
1069
1070
1071
1072
1073
1074
1075
1076
1077
1078
1079
1080
1081
1082
1083
1084
1085
1086
1087
1088
1089
1090
1091
1092
1093
1094
1095
1096
1097
1098
1099
1100
1101
1102
1103
1104
1105
1106
1107
1108
1109
1110
1111
1112
1113
1114
1115
1116
1117
1118
1119
1120
1121
1122
1123
1124
1125
1126
1127
1128
1129
1130
1131
1132
1133
1134
1135
1136
1137
1138
1139
1140
1141
1142
1143
1144
1145
1146
1147
1148
1149
1150
1151
1152
1153
1154
1155
1156
1157
1158
1159
1160
1161
1162
1163
1164
1165
1166
1167
1168
1169
1170
1171
1172
1173
1174
1175
1176
1177
1178
1179
1180
1181
1182
1183
1184
1185
1186
1187
1188
1189
1190
1191
1192
1193
1194
1195
1196
1197
1198
1199
1200
1201
1202
1203
1204
1205
1206
1207
1208
1209
1210
1211
1212
1213
1214
1215
1216
1217
1218
1219
1220
1221
1222
1223
1224
1225
1226
1227
1228
1229
1230
1231
1232
1233
1234
1235
1236
1237
1238
1239
1240
1241
1242
1243
1244
1245
1246
1247
1248
1249
1250
1251
1252
1253
1254
1255
1256
1257
1258
1259
1260
1261
1262
1263
1264
1265
1266
1267
1268
1269
1270
1271
1272
1273
1274
1275
1276
1277
1278
1279
1280
1281
1282
1283
1284
1285
1286
1287
1288
1289
1290
1291
1292
1293
1294
1295
1296
1297
1298
1299
1300
1301
1302
1303
1304
1305
1306
1307
1308
1309
1310
1311
1312
1313
1314
1315
1316
1317
1318
1319
1320
1321
1322
1323
1324
1325
1326
1327
1328
1329
1330
1331
1332
1333
1334
1335
1336
1337
1338
1339
1340
1341
1342
1343
1344
1345
1346
1347
1348
1349
1350
1351
1352
1353
1354
1355
1356
1357
1358
1359
1360
1361
1362
1363
1364
1365
1366
1367
1368
1369
1370
1371
1372
1373
1374
1375
1376
1377
1378
1379
1380
1381
1382
1383
1384
1385
1386
1387
1388
1389
1390
1391
1392
1393
1394
1395
1396
1397
1398
1399
1400
1401
1402
1403
1404
1405
1406
1407
1408
1409
1410
1411
1412
1413
1414
1415
1416
1417
1418
1419
1420
1421
1422
1423
1424
1425
1426
1427
1428
1429
1430
1431
1432
1433
1434
1435
1436
1437
1438
1439
1440
1441
1442
1443
1444
1445
1446
1447
1448
1449
1450
1451
1452
1453
1454
1455
1456
1457
1458
1459
1460
1461
1462
1463
1464
1465
1466
1467
1468
1469
1470
1471
1472
1473
1474
1475
1476
1477
1478
1479
1480
1481
1482
1483
1484
1485
1486
1487
1488
1489
1490
1491
1492
1493
1494
1495
1496
1497
1498
1499
1500
1501
1502
1503
1504
1505
1506
1507
1508
1509
1510
1511
1512
1513
1514
1515
1516
1517
1518
1519
1520
1521
1522
1523
1524
1525
1526
1527
1528
1529
1530
1531
1532
1533
1534
1535
1536
1537
1538
1539
1540
1541
1542
1543
1544
1545
1546
1547
1548
1549
1550
1551
1552
1553
1554
1555
1556
1557
1558
1559
1560
1561
1562
1563
1564
1565
1566
1567
1568
1569
1570
1571
1572
1573
1574
1575
1576
1577
1578
1579
1580
1581
1582
1583
1584
1585
1586
1587
1588
1589
1590
1591
1592
1593
1594
1595
1596
1597
1598
1599
1600
1601
1602
1603
1604
1605
1606
1607
1608
1609
1610
1611
1612
1613
1614
1615
1616
1617
1618
1619
1620
1621
1622
1623
1624
1625
1626
1627
1628
1629
1630
1631
1632
1633
1634
1635
1636
1637
1638
1639
1640
1641
1642
1643
1644
1645
1646
1647
1648
1649
1650
1651
1652
1653
1654
1655
1656
1657
1658
1659
1660
1661
1662
1663
1664
1665
1666
1667
1668
1669
1670
1671
1672
1673
1674
1675
1676
1677
1678
1679
1680
1681
1682
1683
1684
1685
1686
1687
1688
1689
1690
1691
1692
1693
1694
1695
1696
1697
1698
1699
1700
1701
1702
1703
1704
1705
1706
1707
1708
1709
1710
1711
1712
1713
1714
1715
1716
1717
1718
1719
1720
1721
1722
1723
1724
1725
1726
1727
1728
1729
1730
1731
1732
1733
1734
1735
1736
1737
1738
1739
1740
1741
1742
1743
1744
1745
1746
1747
1748
1749
1750
1751
1752
1753
1754
1755
1756
1757
1758
1759
1760
1761
1762
1763
1764
1765
1766
1767
1768
1769
1770
1771
1772
1773
1774
1775
1776
1777
1778
1779
1780
1781
1782
1783
1784
1785
1786
1787
1788
1789
1790
1791
1792
1793
1794
1795
1796
1797
1798
1799
1800
1801
1802
1803
1804
1805
1806
1807
1808
1809
1810
1811
1812
1813
1814
1815
1816
1817
1818
1819
1820
1821
1822
1823
1824
1825
1826
1827
1828
1829
1830
1831
1832
1833
1834
1835
1836
1837
1838
1839
1840
1841
1842
1843
1844
1845
1846
1847
1848
1849
1850
1851
1852
1853
1854
1855
1856
1857
1858
1859
1860
1861
1862
1863
1864
1865
1866
1867
1868
1869
1870
1871
1872
1873
1874
1875
1876
1877
1878
1879
1880
1881
1882
1883
1884
1885
1886
1887
1888
1889
1890
1891
1892
1893
1894
1895
1896
1897
1898
1899
1900
1901
1902
1903
1904
1905
1906
1907
1908
1909
1910
1911
1912
1913
1914
1915
1916
1917
1918
1919
1920
1921
1922
1923
1924
1925
1926
1927
1928
1929
1930
1931
1932
1933
1934
1935
1936
1937
1938
1939
1940
1941
1942
1943
1944
1945
1946
1947
1948
1949
1950
1951
1952
1953
1954
1955
1956
1957
1958
1959
1960
1961
1962
1963
1964
1965
1966
1967
1968
1969
1970
1971
1972
1973
1974
1975
1976
1977
1978
1979
1980
1981
1982
1983
1984
1985
1986
1987
1988
1989
1990
1991
1992
1993
1994
1995
1996
1997
1998
1999
2000
2001
2002
2003
2004
2005
2006
2007
2008
2009
2010
2011
2012
2013
2014
2015
2016
2017
2018
2019
2020
2021
2022
2023
2024
2025
2026
2027
2028
2029
2030
2031
2032
2033
2034
2035
2036
2037
2038
2039
2040
2041
2042
2043
2044
2045
2046
2047
2048
2049
2050
2051
2052
2053
2054
2055
2056
2057
2058
2059
2060
2061
2062
2063
2064
2065
2066
2067
2068
2069
2070
2071
2072
2073
2074
2075
2076
2077
2078
2079
2080
2081
2082
2083
2084
2085
2086
2087
2088
2089
2090
2091
2092
2093
2094
2095
2096
2097
2098
2099
2100
2101
2102
2103
2104
2105
2106
2107
2108
2109
2110
2111
2112
2113
2114
2115
2116
2117
2118
2119
2120
2121
2122
2123
2124
2125
2126
2127
2128
2129
2130
2131
2132
2133
2134
2135
2136
2137
2138
2139
2140
2141
2142
2143
2144
2145
2146
2147
2148
2149
2150
2151
2152
2153
2154
2155
2156
2157
2158
2159
2160
2161
2162
2163
2164
2165
2166
2167
2168
2169
2170
2171
2172
2173
2174
2175
2176
2177
2178
2179
2180
2181
2182
2183
2184
2185
2186
2187
2188
2189
2190
2191
2192
2193
2194
2195
2196
2197
2198
2199
2200
2201
2202
2203
2204
2205
2206
/*
   Common Flash Interface probe code.
   (C) 2000 Red Hat. GPL'd.
   $Id: jedec_probe.c,v 1.66 2005/11/07 11:14:23 gleixner Exp $
   See JEDEC (http://www.jedec.org/) standard JESD21C (section 3.5)
   for the standard this probe goes back to.

   Occasionally maintained by Thayne Harbaugh tharbaugh at lnxi dot com
*/

#include <linux/module.h>
#include <linux/init.h>
#include <linux/types.h>
#include <linux/kernel.h>
#include <asm/io.h>
#include <asm/byteorder.h>
#include <linux/errno.h>
#include <linux/slab.h>
#include <linux/interrupt.h>

#include <linux/mtd/mtd.h>
#include <linux/mtd/map.h>
#include <linux/mtd/cfi.h>
#include <linux/mtd/gen_probe.h>

/* Manufacturers */
#define MANUFACTURER_AMD	0x0001
#define MANUFACTURER_ATMEL	0x001f
#define MANUFACTURER_EON	0x001c
#define MANUFACTURER_FUJITSU	0x0004
#define MANUFACTURER_HYUNDAI	0x00AD
#define MANUFACTURER_INTEL	0x0089
#define MANUFACTURER_MACRONIX	0x00C2
#define MANUFACTURER_NEC	0x0010
#define MANUFACTURER_PMC	0x009D
#define MANUFACTURER_SHARP	0x00b0
#define MANUFACTURER_SST	0x00BF
#define MANUFACTURER_ST		0x0020
#define MANUFACTURER_TOSHIBA	0x0098
#define MANUFACTURER_WINBOND	0x00da
#define CONTINUATION_CODE	0x007f


/* AMD */
#define AM29DL800BB	0x22C8
#define AM29DL800BT	0x224A

#define AM29F800BB	0x2258
#define AM29F800BT	0x22D6
#define AM29LV400BB	0x22BA
#define AM29LV400BT	0x22B9
#define AM29LV800BB	0x225B
#define AM29LV800BT	0x22DA
#define AM29LV160DT	0x22C4
#define AM29LV160DB	0x2249
#define AM29F017D	0x003D
#define AM29F016D	0x00AD
#define AM29F080	0x00D5
#define AM29F040	0x00A4
#define AM29LV040B	0x004F
#define AM29F032B	0x0041
#define AM29F002T	0x00B0
#define AM29SL800DB	0x226B
#define AM29SL800DT	0x22EA

/* Atmel */
#define AT49BV512	0x0003
#define AT29LV512	0x003d
#define AT49BV16X	0x00C0
#define AT49BV16XT	0x00C2
#define AT49BV32X	0x00C8
#define AT49BV32XT	0x00C9

/* Eon */
#define EN29SL800BB	0x226B
#define EN29SL800BT	0x22EA

/* Fujitsu */
#define MBM29F040C	0x00A4
#define MBM29F800BA	0x2258
#define MBM29LV650UE	0x22D7
#define MBM29LV320TE	0x22F6
#define MBM29LV320BE	0x22F9
#define MBM29LV160TE	0x22C4
#define MBM29LV160BE	0x2249
#define MBM29LV800BA	0x225B
#define MBM29LV800TA	0x22DA
#define MBM29LV400TC	0x22B9
#define MBM29LV400BC	0x22BA

/* Hyundai */
#define HY29F002T	0x00B0

/* Intel */
#define I28F004B3T	0x00d4
#define I28F004B3B	0x00d5
#define I28F400B3T	0x8894
#define I28F400B3B	0x8895
#define I28F008S5	0x00a6
#define I28F016S5	0x00a0
#define I28F008SA	0x00a2
#define I28F008B3T	0x00d2
#define I28F008B3B	0x00d3
#define I28F800B3T	0x8892
#define I28F800B3B	0x8893
#define I28F016S3	0x00aa
#define I28F016B3T	0x00d0
#define I28F016B3B	0x00d1
#define I28F160B3T	0x8890
#define I28F160B3B	0x8891
#define I28F320B3T	0x8896
#define I28F320B3B	0x8897
#define I28F640B3T	0x8898
#define I28F640B3B	0x8899
#define I82802AB	0x00ad
#define I82802AC	0x00ac

/* Macronix */
#define MX29LV040C	0x004F
#define MX29LV160T	0x22C4
#define MX29LV160B	0x2249
#define MX29F040	0x00A4
#define MX29F016	0x00AD
#define MX29F002T	0x00B0
#define MX29F004T	0x0045
#define MX29F004B	0x0046

/* NEC */
#define UPD29F064115	0x221C

/* PMC */
#define PM49FL002	0x006D
#define PM49FL004	0x006E
#define PM49FL008	0x006A

/* Sharp */
#define LH28F640BF	0x00b0

/* ST - www.st.com */
#define M29F800AB	0x0058
#define M29W800DT	0x00D7
#define M29W800DB	0x005B
#define M29W400DT	0x00EE
#define M29W400DB	0x00EF
#define M29W160DT	0x22C4
#define M29W160DB	0x2249
#define M29W040B	0x00E3
#define M50FW040	0x002C
#define M50FW080	0x002D
#define M50FW016	0x002E
#define M50LPW080       0x002F
#define M50FLW080A	0x0080
#define M50FLW080B	0x0081

/* SST */
#define SST29EE020	0x0010
#define SST29LE020	0x0012
#define SST29EE512	0x005d
#define SST29LE512	0x003d
#define SST39LF800	0x2781
#define SST39LF160	0x2782
#define SST39VF1601	0x234b
#define SST39LF512	0x00D4
#define SST39LF010	0x00D5
#define SST39LF020	0x00D6
#define SST39LF040	0x00D7
#define SST39SF010A	0x00B5
#define SST39SF020A	0x00B6
#define SST49LF004B	0x0060
#define SST49LF040B	0x0050
#define SST49LF008A	0x005a
#define SST49LF030A	0x001C
#define SST49LF040A	0x0051
#define SST49LF080A	0x005B
#define SST36VF3203	0x7354

/* Toshiba */
#define TC58FVT160	0x00C2
#define TC58FVB160	0x0043
#define TC58FVT321	0x009A
#define TC58FVB321	0x009C
#define TC58FVT641	0x0093
#define TC58FVB641	0x0095

/* Winbond */
#define W49V002A	0x00b0


/*
 * Unlock address sets for AMD command sets.
 * Intel command sets use the MTD_UADDR_UNNECESSARY.
 * Each identifier, except MTD_UADDR_UNNECESSARY, and
 * MTD_UADDR_NO_SUPPORT must be defined below in unlock_addrs[].
 * MTD_UADDR_NOT_SUPPORTED must be 0 so that structure
 * initialization need not require initializing all of the
 * unlock addresses for all bit widths.
 */
enum uaddr {
	MTD_UADDR_NOT_SUPPORTED = 0,	/* data width not supported */
	MTD_UADDR_0x0555_0x02AA,
	MTD_UADDR_0x0555_0x0AAA,
	MTD_UADDR_0x5555_0x2AAA,
	MTD_UADDR_0x0AAA_0x0555,
	MTD_UADDR_DONT_CARE,		/* Requires an arbitrary address */
	MTD_UADDR_UNNECESSARY,		/* Does not require any address */
};


struct unlock_addr {
	uint32_t addr1;
	uint32_t addr2;
};


/*
 * I don't like the fact that the first entry in unlock_addrs[]
 * exists, but is for MTD_UADDR_NOT_SUPPORTED - and, therefore,
 * should not be used.  The  problem is that structures with
 * initializers have extra fields initialized to 0.  It is _very_
 * desireable to have the unlock address entries for unsupported
 * data widths automatically initialized - that means that
 * MTD_UADDR_NOT_SUPPORTED must be 0 and the first entry here
 * must go unused.
 */
static const struct unlock_addr  unlock_addrs[] = {
	[MTD_UADDR_NOT_SUPPORTED] = {
		.addr1 = 0xffff,
		.addr2 = 0xffff
	},

	[MTD_UADDR_0x0555_0x02AA] = {
		.addr1 = 0x0555,
		.addr2 = 0x02aa
	},

	[MTD_UADDR_0x0555_0x0AAA] = {
		.addr1 = 0x0555,
		.addr2 = 0x0aaa
	},

	[MTD_UADDR_0x5555_0x2AAA] = {
		.addr1 = 0x5555,
		.addr2 = 0x2aaa
	},

	[MTD_UADDR_0x0AAA_0x0555] = {
		.addr1 = 0x0AAA,
		.addr2 = 0x0555
	},

	[MTD_UADDR_DONT_CARE] = {
		.addr1 = 0x0000,      /* Doesn't matter which address */
		.addr2 = 0x0000       /* is used - must be last entry */
	},

	[MTD_UADDR_UNNECESSARY] = {
		.addr1 = 0x0000,
		.addr2 = 0x0000
	}
};

struct amd_flash_info {
	const char *name;
	const uint16_t mfr_id;
	const uint16_t dev_id;
	const uint8_t dev_size;
	const uint8_t nr_regions;
	const uint16_t cmd_set;
	const uint32_t regions[6];
	const uint8_t devtypes;		/* Bitmask for x8, x16 etc. */
	const uint8_t uaddr;		/* unlock addrs for 8, 16, 32, 64 */
};

#define ERASEINFO(size,blocks) (size<<8)|(blocks-1)

#define SIZE_64KiB  16
#define SIZE_128KiB 17
#define SIZE_256KiB 18
#define SIZE_512KiB 19
#define SIZE_1MiB   20
#define SIZE_2MiB   21
#define SIZE_4MiB   22
#define SIZE_8MiB   23


/*
 * Please keep this list ordered by manufacturer!
 * Fortunately, the list isn't searched often and so a
 * slow, linear search isn't so bad.
 */
static const struct amd_flash_info jedec_table[] = {
	{
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F032B,
		.name		= "AMD AM29F032B",
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.devtypes	= CFI_DEVICETYPE_X8,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,64)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV160DT,
		.name		= "AMD AM29LV160DT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV160DB,
		.name		= "AMD AM29LV160DB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV400BB,
		.name		= "AMD AM29LV400BB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,7)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV400BT,
		.name		= "AMD AM29LV400BT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,7),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV800BB,
		.name		= "AMD AM29LV800BB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
/* add DL */
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29DL800BB,
		.name		= "AMD AM29DL800BB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 6,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,4),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x04000,1),
			ERASEINFO(0x10000,14)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29DL800BT,
		.name		= "AMD AM29DL800BT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 6,
		.regions	= {
			ERASEINFO(0x10000,14),
			ERASEINFO(0x04000,1),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,4),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F800BB,
		.name		= "AMD AM29F800BB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV800BT,
		.name		= "AMD AM29LV800BT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F800BT,
		.name		= "AMD AM29F800BT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F017D,
		.name		= "AMD AM29F017D",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_DONT_CARE,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F016D,
		.name		= "AMD AM29F016D",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F080,
		.name		= "AMD AM29F080",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F040,
		.name		= "AMD AM29F040",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29LV040B,
		.name		= "AMD AM29LV040B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29F002T,
		.name		= "AMD AM29F002T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,3),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29SL800DT,
		.name		= "AMD AM29SL800DT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_AMD,
		.dev_id		= AM29SL800DB,
		.name		= "AMD AM29SL800DB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT49BV512,
		.name		= "Atmel AT49BV512",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_64KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT29LV512,
		.name		= "Atmel AT29LV512",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_64KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x80,256),
			ERASEINFO(0x80,256)
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT49BV16X,
		.name		= "Atmel AT49BV16X",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x0AAA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000,8),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT49BV16XT,
		.name		= "Atmel AT49BV16XT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x0AAA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x02000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT49BV32X,
		.name		= "Atmel AT49BV32X",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x0AAA,	/* ???? */
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000,8),
			ERASEINFO(0x10000,63)
		}
	}, {
		.mfr_id		= MANUFACTURER_ATMEL,
		.dev_id		= AT49BV32XT,
		.name		= "Atmel AT49BV32XT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x0AAA,	/* ???? */
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000,63),
			ERASEINFO(0x02000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_EON,
		.dev_id		= EN29SL800BT,
		.name		= "Eon EN29SL800BT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_EON,
		.dev_id		= EN29SL800BB,
		.name		= "Eon EN29SL800BB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29F040C,
		.name		= "Fujitsu MBM29F040C",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29F800BA,
		.name		= "Fujitsu MBM29F800BA",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV650UE,
		.name		= "Fujitsu MBM29LV650UE",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_DONT_CARE,
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,128)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV320TE,
		.name		= "Fujitsu MBM29LV320TE",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000,63),
			ERASEINFO(0x02000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV320BE,
		.name		= "Fujitsu MBM29LV320BE",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000,8),
			ERASEINFO(0x10000,63)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV160TE,
		.name		= "Fujitsu MBM29LV160TE",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV160BE,
		.name		= "Fujitsu MBM29LV160BE",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV800BA,
		.name		= "Fujitsu MBM29LV800BA",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV800TA,
		.name		= "Fujitsu MBM29LV800TA",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV400BC,
		.name		= "Fujitsu MBM29LV400BC",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,7)
		}
	}, {
		.mfr_id		= MANUFACTURER_FUJITSU,
		.dev_id		= MBM29LV400TC,
		.name		= "Fujitsu MBM29LV400TC",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,7),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_HYUNDAI,
		.dev_id		= HY29F002T,
		.name		= "Hyundai HY29F002T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,3),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F004B3B,
		.name		= "Intel 28F004B3B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 7),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F004B3T,
		.name		= "Intel 28F004B3T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 7),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F400B3B,
		.name		= "Intel 28F400B3B",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 7),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F400B3T,
		.name		= "Intel 28F400B3T",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 7),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F008B3B,
		.name		= "Intel 28F008B3B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 15),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F008B3T,
		.name		= "Intel 28F008B3T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 15),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F008S5,
		.name		= "Intel 28F008S5",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F016S5,
		.name		= "Intel 28F016S5",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F008SA,
		.name		= "Intel 28F008SA",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000, 16),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F800B3B,
		.name		= "Intel 28F800B3B",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 15),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F800B3T,
		.name		= "Intel 28F800B3T",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 15),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F016B3B,
		.name		= "Intel 28F016B3B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 31),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F016S3,
		.name		= "Intel I28F016S3",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000, 32),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F016B3T,
		.name		= "Intel 28F016B3T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 31),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F160B3B,
		.name		= "Intel 28F160B3B",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 31),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F160B3T,
		.name		= "Intel 28F160B3T",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 31),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F320B3B,
		.name		= "Intel 28F320B3B",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 63),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F320B3T,
		.name		= "Intel 28F320B3T",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 63),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F640B3B,
		.name		= "Intel 28F640B3B",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000, 8),
			ERASEINFO(0x10000, 127),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I28F640B3T,
		.name		= "Intel 28F640B3T",
		.devtypes	= CFI_DEVICETYPE_X16,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000, 127),
			ERASEINFO(0x02000, 8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I82802AB,
		.name		= "Intel 82802AB",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_INTEL,
		.dev_id		= I82802AC,
		.name		= "Intel 82802AC",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29LV040C,
		.name		= "Macronix MX29LV040C",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29LV160T,
		.name		= "MXIC MX29LV160T",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_NEC,
		.dev_id		= UPD29F064115,
		.name		= "NEC uPD29F064115",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,	/* ???? */
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 3,
		.regions	= {
			ERASEINFO(0x2000,8),
			ERASEINFO(0x10000,126),
			ERASEINFO(0x2000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29LV160B,
		.name		= "MXIC MX29LV160B",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29F040,
		.name		= "Macronix MX29F040",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29F016,
		.name		= "Macronix MX29F016",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29F004T,
		.name		= "Macronix MX29F004T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,7),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29F004B,
		.name		= "Macronix MX29F004B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,7),
		}
	}, {
		.mfr_id		= MANUFACTURER_MACRONIX,
		.dev_id		= MX29F002T,
		.name		= "Macronix MX29F002T",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,3),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1),
		}
	}, {
		.mfr_id		= MANUFACTURER_PMC,
		.dev_id		= PM49FL002,
		.name		= "PMC Pm49FL002",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO( 0x01000, 64 )
		}
	}, {
		.mfr_id		= MANUFACTURER_PMC,
		.dev_id		= PM49FL004,
		.name		= "PMC Pm49FL004",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO( 0x01000, 128 )
		}
	}, {
		.mfr_id		= MANUFACTURER_PMC,
		.dev_id		= PM49FL008,
		.name		= "PMC Pm49FL008",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO( 0x01000, 256 )
		}
	}, {
		.mfr_id		= MANUFACTURER_SHARP,
		.dev_id		= LH28F640BF,
		.name		= "LH28F640BF",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_INTEL_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x40000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39LF512,
		.name		= "SST 39LF512",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_64KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39LF010,
		.name		= "SST 39LF010",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_128KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
 		.dev_id 	= SST29EE020,
		.name		= "SST 29EE020",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_SST_PAGE,
		.nr_regions	= 1,
		.regions = {ERASEINFO(0x01000,64),
		}
	}, {
 		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST29LE020,
 		.name		= "SST 29LE020",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_SST_PAGE,
		.nr_regions	= 1,
		.regions = {ERASEINFO(0x01000,64),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39LF020,
		.name		= "SST 39LF020",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,64),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39LF040,
		.name		= "SST 39LF040",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,128),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39SF010A,
		.name		= "SST 39SF010A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_128KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST39SF020A,
		.name		= "SST 39SF020A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,64),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF040B,
		.name		= "SST 49LF040B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,128),
		}
	}, {

		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF004B,
		.name		= "SST 49LF004B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,128),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF008A,
		.name		= "SST 49LF008A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,256),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF030A,
		.name		= "SST 49LF030A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,96),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF040A,
		.name		= "SST 49LF040A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,128),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST49LF080A,
		.name		= "SST 49LF080A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x01000,256),
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,     /* should be CFI */
		.dev_id		= SST39LF160,
		.name		= "SST 39LF160",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x1000,256),
			ERASEINFO(0x1000,256)
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,     /* should be CFI */
		.dev_id		= SST39VF1601,
		.name		= "SST 39VF1601",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x1000,256),
			ERASEINFO(0x1000,256)
		}
	}, {
		.mfr_id		= MANUFACTURER_SST,
		.dev_id		= SST36VF3203,
		.name		= "SST 36VF3203",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,64),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M29F800AB,
		.name		= "ST M29F800AB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,	/* FIXME - CFI device? */
		.dev_id		= M29W800DT,
		.name		= "ST M29W800DT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,	/* ???? */
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,15),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,	/* FIXME - CFI device? */
		.dev_id		= M29W800DB,
		.name		= "ST M29W800DB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,	/* ???? */
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,15)
		}
	},  {
		.mfr_id         = MANUFACTURER_ST,
		.dev_id         = M29W400DT,
		.name           = "ST M29W400DT",
		.devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr          = MTD_UADDR_0x0AAA_0x0555,
		.dev_size       = SIZE_512KiB,
		.cmd_set        = P_ID_AMD_STD,
		.nr_regions     = 4,
		.regions        = {
			ERASEINFO(0x04000,7),
			ERASEINFO(0x02000,1),
			ERASEINFO(0x08000,2),
			ERASEINFO(0x10000,1)
		}
	}, {
		.mfr_id         = MANUFACTURER_ST,
		.dev_id         = M29W400DB,
		.name           = "ST M29W400DB",
		.devtypes       = CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr          = MTD_UADDR_0x0AAA_0x0555,
		.dev_size       = SIZE_512KiB,
		.cmd_set        = P_ID_AMD_STD,
		.nr_regions     = 4,
		.regions        = {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,7)
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,	/* FIXME - CFI device? */
		.dev_id		= M29W160DT,
		.name		= "ST M29W160DT",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,	/* FIXME - CFI device? */
		.dev_id		= M29W160DB,
		.name		= "ST M29W160DB",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,	/* ???? */
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M29W040B,
		.name		= "ST M29W040B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0555_0x02AA,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50FW040,
		.name		= "ST M50FW040",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_512KiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,8),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50FW080,
		.name		= "ST M50FW080",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50FW016,
		.name		= "ST M50FW016",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,32),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50LPW080,
		.name		= "ST M50LPW080",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 1,
		.regions	= {
			ERASEINFO(0x10000,16),
		},
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50FLW080A,
		.name		= "ST M50FLW080A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x1000,16),
			ERASEINFO(0x10000,13),
			ERASEINFO(0x1000,16),
			ERASEINFO(0x1000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_ST,
		.dev_id		= M50FLW080B,
		.name		= "ST M50FLW080B",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_UNNECESSARY,
		.dev_size	= SIZE_1MiB,
		.cmd_set	= P_ID_INTEL_EXT,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x1000,16),
			ERASEINFO(0x1000,16),
			ERASEINFO(0x10000,13),
			ERASEINFO(0x1000,16),
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVT160,
		.name		= "Toshiba TC58FVT160",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000,31),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x04000,1)
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVB160,
		.name		= "Toshiba TC58FVB160",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_2MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x04000,1),
			ERASEINFO(0x02000,2),
			ERASEINFO(0x08000,1),
			ERASEINFO(0x10000,31)
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVB321,
		.name		= "Toshiba TC58FVB321",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000,8),
			ERASEINFO(0x10000,63)
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVT321,
		.name		= "Toshiba TC58FVT321",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_4MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000,63),
			ERASEINFO(0x02000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVB641,
		.name		= "Toshiba TC58FVB641",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x02000,8),
			ERASEINFO(0x10000,127)
		}
	}, {
		.mfr_id		= MANUFACTURER_TOSHIBA,
		.dev_id		= TC58FVT641,
		.name		= "Toshiba TC58FVT641",
		.devtypes	= CFI_DEVICETYPE_X16|CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x0AAA_0x0555,
		.dev_size	= SIZE_8MiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 2,
		.regions	= {
			ERASEINFO(0x10000,127),
			ERASEINFO(0x02000,8)
		}
	}, {
		.mfr_id		= MANUFACTURER_WINBOND,
		.dev_id		= W49V002A,
		.name		= "Winbond W49V002A",
		.devtypes	= CFI_DEVICETYPE_X8,
		.uaddr		= MTD_UADDR_0x5555_0x2AAA,
		.dev_size	= SIZE_256KiB,
		.cmd_set	= P_ID_AMD_STD,
		.nr_regions	= 4,
		.regions	= {
			ERASEINFO(0x10000, 3),
			ERASEINFO(0x08000, 1),
			ERASEINFO(0x02000, 2),
			ERASEINFO(0x04000, 1),
		}
	}
};

static inline u32 jedec_read_mfr(struct map_info *map, uint32_t base,
	struct cfi_private *cfi)
{
	map_word result;
	unsigned long mask;
	int bank = 0;

	/* According to JEDEC "Standard Manufacturer's Identification Code"
	 * (http://www.jedec.org/download/search/jep106W.pdf)
	 * several first banks can contain 0x7f instead of actual ID
	 */
	do {
		uint32_t ofs = cfi_build_cmd_addr(0 + (bank << 8),
						  cfi_interleave(cfi),
						  cfi->device_type);
		mask = (1 << (cfi->device_type * 8)) - 1;
		result = map_read(map, base + ofs);
		bank++;
	} while ((result.x[0] & mask) == CONTINUATION_CODE);

	return result.x[0] & mask;
}

static inline u32 jedec_read_id(struct map_info *map, uint32_t base,
	struct cfi_private *cfi)
{
	map_word result;
	unsigned long mask;
	u32 ofs = cfi_build_cmd_addr(1, cfi_interleave(cfi), cfi->device_type);
	mask = (1 << (cfi->device_type * 8)) -1;
	result = map_read(map, base + ofs);
	return result.x[0] & mask;
}

static void jedec_reset(u32 base, struct map_info *map, struct cfi_private *cfi)
{
	/* Reset */

	/* after checking the datasheets for SST, MACRONIX and ATMEL
	 * (oh and incidentaly the jedec spec - 3.5.3.3) the reset
	 * sequence is *supposed* to be 0xaa at 0x5555, 0x55 at
	 * 0x2aaa, 0xF0 at 0x5555 this will not affect the AMD chips
	 * as they will ignore the writes and dont care what address
	 * the F0 is written to */
	if (cfi->addr_unlock1) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "reset unlock called %x %x \n",
		       cfi->addr_unlock1,cfi->addr_unlock2);
		cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
		cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
	}

	cfi_send_gen_cmd(0xF0, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	/* Some misdesigned Intel chips do not respond for 0xF0 for a reset,
	 * so ensure we're in read mode.  Send both the Intel and the AMD command
	 * for this.  Intel uses 0xff for this, AMD uses 0xff for NOP, so
	 * this should be safe.
	 */
	cfi_send_gen_cmd(0xFF, 0, base, map, cfi, cfi->device_type, NULL);
	/* FIXME - should have reset delay before continuing */
}


static int cfi_jedec_setup(struct cfi_private *p_cfi, int index)
{
	int i,num_erase_regions;
	uint8_t uaddr;

	if (! (jedec_table[index].devtypes & p_cfi->device_type)) {
		DEBUG(MTD_DEBUG_LEVEL1, "Rejecting potential %s with incompatible %d-bit device type\n",
		      jedec_table[index].name, 4 * (1<<p_cfi->device_type));
		return 0;
	}

	printk(KERN_INFO "Found: %s\n",jedec_table[index].name);

	num_erase_regions = jedec_table[index].nr_regions;

	p_cfi->cfiq = kmalloc(sizeof(struct cfi_ident) + num_erase_regions * 4, GFP_KERNEL);
	if (!p_cfi->cfiq) {
		//xx printk(KERN_WARNING "%s: kmalloc failed for CFI ident structure\n", map->name);
		return 0;
	}

	memset(p_cfi->cfiq,0,sizeof(struct cfi_ident));

	p_cfi->cfiq->P_ID = jedec_table[index].cmd_set;
	p_cfi->cfiq->NumEraseRegions = jedec_table[index].nr_regions;
	p_cfi->cfiq->DevSize = jedec_table[index].dev_size;
	p_cfi->cfi_mode = CFI_MODE_JEDEC;

	for (i=0; i<num_erase_regions; i++){
		p_cfi->cfiq->EraseRegionInfo[i] = jedec_table[index].regions[i];
	}
	p_cfi->cmdset_priv = NULL;

	/* This may be redundant for some cases, but it doesn't hurt */
	p_cfi->mfr = jedec_table[index].mfr_id;
	p_cfi->id = jedec_table[index].dev_id;

	uaddr = jedec_table[index].uaddr;

	/* The table has unlock addresses in _bytes_, and we try not to let
	   our brains explode when we see the datasheets talking about address
	   lines numbered from A-1 to A18. The CFI table has unlock addresses
	   in device-words according to the mode the device is connected in */
	p_cfi->addr_unlock1 = unlock_addrs[uaddr].addr1 / p_cfi->device_type;
	p_cfi->addr_unlock2 = unlock_addrs[uaddr].addr2 / p_cfi->device_type;

	return 1; 	/* ok */
}


/*
 * There is a BIG problem properly ID'ing the JEDEC device and guaranteeing
 * the mapped address, unlock addresses, and proper chip ID.  This function
 * attempts to minimize errors.  It is doubtfull that this probe will ever
 * be perfect - consequently there should be some module parameters that
 * could be manually specified to force the chip info.
 */
static inline int jedec_match( uint32_t base,
			       struct map_info *map,
			       struct cfi_private *cfi,
			       const struct amd_flash_info *finfo )
{
	int rc = 0;           /* failure until all tests pass */
	u32 mfr, id;
	uint8_t uaddr;

	/*
	 * The IDs must match.  For X16 and X32 devices operating in
	 * a lower width ( X8 or X16 ), the device ID's are usually just
	 * the lower byte(s) of the larger device ID for wider mode.  If
	 * a part is found that doesn't fit this assumption (device id for
	 * smaller width mode is completely unrealated to full-width mode)
	 * then the jedec_table[] will have to be augmented with the IDs
	 * for different widths.
	 */
	switch (cfi->device_type) {
	case CFI_DEVICETYPE_X8:
		mfr = (uint8_t)finfo->mfr_id;
		id = (uint8_t)finfo->dev_id;

		/* bjd: it seems that if we do this, we can end up
		 * detecting 16bit flashes as an 8bit device, even though
		 * there aren't.
		 */
		if (finfo->dev_id > 0xff) {
			DEBUG( MTD_DEBUG_LEVEL3, "%s(): ID is not 8bit\n",
			       __func__);
			goto match_done;
		}
		break;
	case CFI_DEVICETYPE_X16:
		mfr = (uint16_t)finfo->mfr_id;
		id = (uint16_t)finfo->dev_id;
		break;
	case CFI_DEVICETYPE_X32:
		mfr = (uint16_t)finfo->mfr_id;
		id = (uint32_t)finfo->dev_id;
		break;
	default:
		printk(KERN_WARNING
		       "MTD %s(): Unsupported device type %d\n",
		       __func__, cfi->device_type);
		goto match_done;
	}
	if ( cfi->mfr != mfr || cfi->id != id ) {
		goto match_done;
	}

	/* the part size must fit in the memory window */
	DEBUG( MTD_DEBUG_LEVEL3,
	       "MTD %s(): Check fit 0x%.8x + 0x%.8x = 0x%.8x\n",
	       __func__, base, 1 << finfo->dev_size, base + (1 << finfo->dev_size) );
	if ( base + cfi_interleave(cfi) * ( 1 << finfo->dev_size ) > map->size ) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "MTD %s(): 0x%.4x 0x%.4x %dKiB doesn't fit\n",
		       __func__, finfo->mfr_id, finfo->dev_id,
		       1 << finfo->dev_size );
		goto match_done;
	}

	if (! (finfo->devtypes & cfi->device_type))
		goto match_done;

	uaddr = finfo->uaddr;

	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): check unlock addrs 0x%.4x 0x%.4x\n",
	       __func__, cfi->addr_unlock1, cfi->addr_unlock2 );
	if ( MTD_UADDR_UNNECESSARY != uaddr && MTD_UADDR_DONT_CARE != uaddr
	     && ( unlock_addrs[uaddr].addr1 / cfi->device_type != cfi->addr_unlock1 ||
		  unlock_addrs[uaddr].addr2 / cfi->device_type != cfi->addr_unlock2 ) ) {
		DEBUG( MTD_DEBUG_LEVEL3,
			"MTD %s(): 0x%.4x 0x%.4x did not match\n",
			__func__,
			unlock_addrs[uaddr].addr1,
			unlock_addrs[uaddr].addr2);
		goto match_done;
	}

	/*
	 * Make sure the ID's dissappear when the device is taken out of
	 * ID mode.  The only time this should fail when it should succeed
	 * is when the ID's are written as data to the same
	 * addresses.  For this rare and unfortunate case the chip
	 * cannot be probed correctly.
	 * FIXME - write a driver that takes all of the chip info as
	 * module parameters, doesn't probe but forces a load.
	 */
	DEBUG( MTD_DEBUG_LEVEL3,
	       "MTD %s(): check ID's disappear when not in ID mode\n",
	       __func__ );
	jedec_reset( base, map, cfi );
	mfr = jedec_read_mfr( map, base, cfi );
	id = jedec_read_id( map, base, cfi );
	if ( mfr == cfi->mfr && id == cfi->id ) {
		DEBUG( MTD_DEBUG_LEVEL3,
		       "MTD %s(): ID 0x%.2x:0x%.2x did not change after reset:\n"
		       "You might need to manually specify JEDEC parameters.\n",
			__func__, cfi->mfr, cfi->id );
		goto match_done;
	}

	/* all tests passed - mark  as success */
	rc = 1;

	/*
	 * Put the device back in ID mode - only need to do this if we
	 * were truly frobbing a real device.
	 */
	DEBUG( MTD_DEBUG_LEVEL3, "MTD %s(): return to ID mode\n", __func__ );
	if (cfi->addr_unlock1) {
		cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
		cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
	}
	cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	/* FIXME - should have a delay before continuing */

 match_done:
	return rc;
}


static int jedec_probe_chip(struct map_info *map, __u32 base,
			    unsigned long *chip_map, struct cfi_private *cfi)
{
	int i;
	enum uaddr uaddr_idx = MTD_UADDR_NOT_SUPPORTED;
	u32 probe_offset1, probe_offset2;

 retry:
	if (!cfi->numchips) {
		uaddr_idx++;

		if (MTD_UADDR_UNNECESSARY == uaddr_idx)
			return 0;

		cfi->addr_unlock1 = unlock_addrs[uaddr_idx].addr1 / cfi->device_type;
		cfi->addr_unlock2 = unlock_addrs[uaddr_idx].addr2 / cfi->device_type;
	}

	/* Make certain we aren't probing past the end of map */
	if (base >= map->size) {
		printk(KERN_NOTICE
			"Probe at base(0x%08x) past the end of the map(0x%08lx)\n",
			base, map->size -1);
		return 0;

	}
	/* Ensure the unlock addresses we try stay inside the map */
	probe_offset1 = cfi_build_cmd_addr(cfi->addr_unlock1, cfi_interleave(cfi), cfi->device_type);
	probe_offset2 = cfi_build_cmd_addr(cfi->addr_unlock2, cfi_interleave(cfi), cfi->device_type);
	if (	((base + probe_offset1 + map_bankwidth(map)) >= map->size) ||
		((base + probe_offset2 + map_bankwidth(map)) >= map->size))
		goto retry;

	/* Reset */
	jedec_reset(base, map, cfi);

	/* Autoselect Mode */
	if(cfi->addr_unlock1) {
		cfi_send_gen_cmd(0xaa, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
		cfi_send_gen_cmd(0x55, cfi->addr_unlock2, base, map, cfi, cfi->device_type, NULL);
	}
	cfi_send_gen_cmd(0x90, cfi->addr_unlock1, base, map, cfi, cfi->device_type, NULL);
	/* FIXME - should have a delay before continuing */

	if (!cfi->numchips) {
		/* This is the first time we're called. Set up the CFI
		   stuff accordingly and return */

		cfi->mfr = jedec_read_mfr(map, base, cfi);
		cfi->id = jedec_read_id(map, base, cfi);
		DEBUG(MTD_DEBUG_LEVEL3,
		      "Search for id:(%02x %02x) interleave(%d) type(%d)\n",
			cfi->mfr, cfi->id, cfi_interleave(cfi), cfi->device_type);
		for (i = 0; i < ARRAY_SIZE(jedec_table); i++) {
			if ( jedec_match( base, map, cfi, &jedec_table[i] ) ) {
				DEBUG( MTD_DEBUG_LEVEL3,
				       "MTD %s(): matched device 0x%x,0x%x unlock_addrs: 0x%.4x 0x%.4x\n",
				       __func__, cfi->mfr, cfi->id,
				       cfi->addr_unlock1, cfi->addr_unlock2 );
				if (!cfi_jedec_setup(cfi, i))
					return 0;
				goto ok_out;
			}
		}
		goto retry;
	} else {
		uint16_t mfr;
		uint16_t id;

		/* Make sure it is a chip of the same manufacturer and id */
		mfr = jedec_read_mfr(map, base, cfi);
		id = jedec_read_id(map, base, cfi);

		if ((mfr != cfi->mfr) || (id != cfi->id)) {
			printk(KERN_DEBUG "%s: Found different chip or no chip at all (mfr 0x%x, id 0x%x) at 0x%x\n",
			       map->name, mfr, id, base);
			jedec_reset(base, map, cfi);
			return 0;
		}
	}

	/* Check each previous chip locations to see if it's an alias */
	for (i=0; i < (base >> cfi->chipshift); i++) {
		unsigned long start;
		if(!test_bit(i, chip_map)) {
			continue; /* Skip location; no valid chip at this address */
		}
		start = i << cfi->chipshift;
		if (jedec_read_mfr(map, start, cfi) == cfi->mfr &&
		    jedec_read_id(map, start, cfi) == cfi->id) {
			/* Eep. This chip also looks like it's in autoselect mode.
			   Is it an alias for the new one? */
			jedec_reset(start, map, cfi);

			/* If the device IDs go away, it's an alias */
			if (jedec_read_mfr(map, base, cfi) != cfi->mfr ||
			    jedec_read_id(map, base, cfi) != cfi->id) {
				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
				       map->name, base, start);
				return 0;
			}

			/* Yes, it's actually got the device IDs as data. Most
			 * unfortunate. Stick the new chip in read mode
			 * too and if it's the same, assume it's an alias. */
			/* FIXME: Use other modes to do a proper check */
			jedec_reset(base, map, cfi);
			if (jedec_read_mfr(map, base, cfi) == cfi->mfr &&
			    jedec_read_id(map, base, cfi) == cfi->id) {
				printk(KERN_DEBUG "%s: Found an alias at 0x%x for the chip at 0x%lx\n",
				       map->name, base, start);
				return 0;
			}
		}
	}

	/* OK, if we got to here, then none of the previous chips appear to
	   be aliases for the current one. */
	set_bit((base >> cfi->chipshift), chip_map); /* Update chip map */
	cfi->numchips++;

ok_out:
	/* Put it back into Read Mode */
	jedec_reset(base, map, cfi);

	printk(KERN_INFO "%s: Found %d x%d devices at 0x%x in %d-bit bank\n",
	       map->name, cfi_interleave(cfi), cfi->device_type*8, base,
	       map->bankwidth*8);

	return 1;
}

static struct chip_probe jedec_chip_probe = {
	.name = "JEDEC",
	.probe_chip = jedec_probe_chip
};

static struct mtd_info *jedec_probe(struct map_info *map)
{
	/*
	 * Just use the generic probe stuff to call our CFI-specific
	 * chip_probe routine in all the possible permutations, etc.
	 */
	return mtd_do_chip_probe(map, &jedec_chip_probe);
}

static struct mtd_chip_driver jedec_chipdrv = {
	.probe	= jedec_probe,
	.name	= "jedec_probe",
	.module	= THIS_MODULE
};

static int __init jedec_probe_init(void)
{
	register_mtd_chip_driver(&jedec_chipdrv);
	return 0;
}

static void __exit jedec_probe_exit(void)
{
	unregister_mtd_chip_driver(&jedec_chipdrv);
}

module_init(jedec_probe_init);
module_exit(jedec_probe_exit);

MODULE_LICENSE("GPL");
MODULE_AUTHOR("Erwin Authried <eauth@softsys.co.at> et al.");
MODULE_DESCRIPTION("Probe code for JEDEC-compliant flash chips");