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authorShuicheng Lin <shuicheng.lin@intel.com>2025-04-05 17:15:39 +0000
committerMatt Roper <matthew.d.roper@intel.com>2025-04-09 16:11:17 -0700
commit3ded92c439449d69017d7a41c5eda3392d6724c7 (patch)
treec9bd6f319c59a7fc6e838d5b2a12f30a7340eb21
parentdrm/xe: Enable configfs support for survivability mode (diff)
downloadlinux-rng-3ded92c439449d69017d7a41c5eda3392d6724c7.tar.xz
linux-rng-3ded92c439449d69017d7a41c5eda3392d6724c7.zip
drm/xe: remove unused LE_COS
The LE_COS definition missed passing the value parameter to REG_FIELD_PREP. This didn't cause build errors because the entire macro was unused. The value for this field is universally "0" for every MOCS entry on the old Xe_LP platforms, and the whole field has been removed from Xe_HP onward. Just delete the line so that we don't have an unused definition. Suggested-by: Matt Roper <matthew.d.roper@intel.com> Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Shuicheng Lin <shuicheng.lin@intel.com> Link: https://lore.kernel.org/r/20250405171539.599850-1-shuicheng.lin@intel.com Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
-rw-r--r--drivers/gpu/drm/xe/regs/xe_gt_regs.h1
1 files changed, 0 insertions, 1 deletions
diff --git a/drivers/gpu/drm/xe/regs/xe_gt_regs.h b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
index 58f4218c2569..cbb9f7cbcfc0 100644
--- a/drivers/gpu/drm/xe/regs/xe_gt_regs.h
+++ b/drivers/gpu/drm/xe/regs/xe_gt_regs.h
@@ -62,7 +62,6 @@
#define LE_SSE_MASK REG_GENMASK(18, 17)
#define LE_SSE(value) REG_FIELD_PREP(LE_SSE_MASK, value)
#define LE_COS_MASK REG_GENMASK(16, 15)
-#define LE_COS(value) REG_FIELD_PREP(LE_COS_MASK)
#define LE_SCF_MASK REG_BIT(14)
#define LE_SCF(value) REG_FIELD_PREP(LE_SCF_MASK, value)
#define LE_PFM_MASK REG_GENMASK(13, 11)