diff options
| author |   Kathiravan Thirumoorthy <quic_kathirav@quicinc.com> | 2023-09-14 12:29:55 +0530 |
|---|---|---|
| committer |   Bjorn Andersson <andersson@kernel.org> | 2023-10-21 12:59:13 -0700 |
| commit | 5635ef0bd1052420bc659a00be6fd0c60cec5cb9 (patch) | |
| tree | 08ae184dd405cb8e89e2e8474cec523550f90ce8 | |
| parent | clk: qcom: ipq9574: drop the CLK_SET_RATE_PARENT flag from GPLL clocks (diff) | |
| download | linux-rng-5635ef0bd1052420bc659a00be6fd0c60cec5cb9.tar.xz linux-rng-5635ef0bd1052420bc659a00be6fd0c60cec5cb9.zip | |
clk: qcom: ipq5332: drop the CLK_SET_RATE_PARENT flag from GPLL clocks
GPLL clock rates are fixed and shouldn't be scaled based on the
request from dependent clocks. Doing so will result in the unexpected
behaviour. So drop the CLK_SET_RATE_PARENT flag from the GPLL clocks.
Fixes: 3d89d52970fd ("clk: qcom: add Global Clock controller (GCC) driver for IPQ5332 SoC")
Signed-off-by: Kathiravan Thirumoorthy <quic_kathirav@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230913-gpll_cleanup-v2-5-c8ceb1a37680@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
| -rw-r--r-- | drivers/clk/qcom/gcc-ipq5332.c | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/drivers/clk/qcom/gcc-ipq5332.c b/drivers/clk/qcom/gcc-ipq5332.c index b836159fbdef..f98591148a97 100644 --- a/drivers/clk/qcom/gcc-ipq5332.c +++ b/drivers/clk/qcom/gcc-ipq5332.c @@ -112,7 +112,6 @@ static struct clk_alpha_pll_postdiv gpll2 = { &gpll2_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, }, }; @@ -152,7 +151,6 @@ static struct clk_alpha_pll_postdiv gpll4 = { &gpll4_main.clkr.hw }, .num_parents = 1, .ops = &clk_alpha_pll_postdiv_ro_ops, - .flags = CLK_SET_RATE_PARENT, }, }; |