diff options
| author |   Saaem Rizvi <SyedSaaem.Rizvi@amd.com> | 2023-01-05 18:28:34 -0500 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2023-01-24 13:26:24 -0500 |
| commit | ae284577d8a4a2ffdd25acc221d51a4ac05a2b2d (patch) | |
| tree | 5424982210714186c4e417cc9f95cf3c2c0a1051 | |
| parent | drm/amd/display: Set hvm_enabled flag for S/G mode (diff) | |
| download | linux-rng-ae284577d8a4a2ffdd25acc221d51a4ac05a2b2d.tar.xz linux-rng-ae284577d8a4a2ffdd25acc221d51a4ac05a2b2d.zip | |
drm/amd/display: Correcting prefetch mode for fast validate
[WHY and HOW]
When fast validating, we should be agnostic to any sort of optimizations
such as supporting Pstate or stutter in Vblank. We should change our
prefetch mode for fast validate to support none of these optimizations.
For example, Valve Index running at 144Hz can only be validated without
any support these optimizations.
Reviewed-by: Alvin Lee <Alvin.Lee2@amd.com>
Acked-by: Alan Liu <HaoPing.Liu@amd.com>
Signed-off-by: Saaem Rizvi <SyedSaaem.Rizvi@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 8 |
1 files changed, 1 insertions, 7 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index 37915ea935ba..2b8037e4a56d 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -1601,17 +1601,11 @@ bool dcn32_internal_validate_bw(struct dc *dc, * to support with Prefetch mode 1 (dm_prefetch_support_fclk_and_stutter == 2) */ context->bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final = - dm_prefetch_support_fclk_and_stutter; + dm_prefetch_support_none; context->bw_ctx.dml.validate_max_state = fast_validate; vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); - /* Last attempt with Prefetch mode 2 (dm_prefetch_support_stutter == 3) */ - if (vlevel == context->bw_ctx.dml.soc.num_states) { - context->bw_ctx.dml.soc.allow_for_pstate_or_stutter_in_vblank_final = - dm_prefetch_support_stutter; - vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, pipe_cnt); - } context->bw_ctx.dml.validate_max_state = false; if (vlevel < context->bw_ctx.dml.soc.num_states) { |