Merge branch 'pci/controller/apple'

- Skip ports disabled in DT when setting up ports (Janne Grunau)

- Add t6020 compatible string (Alyssa Rosenzweig)

- Extract ECAM bridge creation helper from pci_host_common_probe() to
  separate driver-specific things like MSI from PCI things (Marc Zyngier)

- Dynamically allocate RID-to_SID bitmap to prepare for SoCs with varying
  capabilities (Marc Zyngier)

- Directly set/clear INTx mask bits because T602x dropped the accessors
  that could do this without locking (Marc Zyngier)

- Move port PHY registers to their own reg items to accommodate T602x,
  which moves them around; retain default offsets for existing DTs that
  lack phy%d entries with the reg offsets (Hector Martin)

- Stop polling for core refclk, which doesn't work on T602x and the
  bootloader has already done anyway (Hector Martin)

- Use gpiod_set_value_cansleep() when asserting PERST# in probe because
  we're allowed to sleep there (Hector Martin)

- Move register offsets into SoC-specific structure (Hector Martin)

- Add T602x PCIe support (Hector Martin)

* pci/controller/apple:
  PCI: apple: Add T602x PCIe support
  PCI: apple: Abstract register offsets via a SoC-specific structure
  PCI: apple: Use gpiod_set_value_cansleep in probe flow
  PCI: apple: Drop poll for CORE_RC_PHYIF_STAT_REFCLK
  PCI: apple: Move port PHY registers to their own reg items
  PCI: apple: Fix missing OF node reference in apple_pcie_setup_port
  PCI: apple: Move away from INTMSK{SET,CLR} for INTx and private interrupts
  PCI: apple: Dynamically allocate RID-to_SID bitmap
  PCI: apple: Move over to standalone probing
  PCI: ecam: Allow cfg->priv to be pre-populated from the root port device
  PCI: host-generic: Extract an ECAM bridge creation helper from pci_host_common_probe()
  dt-bindings: pci: apple,pcie: Add t6020 compatible string
  PCI: apple: Set only available ports up

1 files changed, 26 insertions, 7 deletions

diff --git a/Documentation/devicetree/bindings/pci/apple,pcie.yaml b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
index c8775f9cb071..c0852be04f6d 100644
--- a/Documentation/devicetree/bindings/pci/apple,pcie.yaml
+++ b/Documentation/devicetree/bindings/pci/apple,pcie.yaml
@@ -17,6 +17,10 @@ description: |
   implements its root ports.  But the ATU found on most DesignWare
   PCIe host bridges is absent.
 
+  On systems derived from T602x, the PHY registers are in a region
+  separate from the port registers. In that case, there is one PHY
+  register range per port register range.
+
   All root ports share a single ECAM space, but separate GPIOs are
   used to take the PCI devices on those ports out of reset.  Therefore
   the standard "reset-gpios" and "max-link-speed" properties appear on
@@ -30,16 +34,18 @@ description: |
 
 properties:
   compatible:
-    items:
-      - enum:
-          - apple,t8103-pcie
-          - apple,t8112-pcie
-          - apple,t6000-pcie
-      - const: apple,pcie
+    oneOf:
+      - items:
+          - enum:
+              - apple,t8103-pcie
+              - apple,t8112-pcie
+              - apple,t6000-pcie
+          - const: apple,pcie
+      - const: apple,t6020-pcie
 
   reg:
     minItems: 3
-    maxItems: 6
+    maxItems: 10
 
   reg-names:
     minItems: 3
@@ -50,6 +56,10 @@ properties:
       - const: port1
       - const: port2
       - const: port3
+      - const: phy0
+      - const: phy1
+      - const: phy2
+      - const: phy3
 
   ranges:
     minItems: 2
@@ -98,6 +108,15 @@ allOf:
           maxItems: 5
         interrupts:
           maxItems: 3
+  - if:
+      properties:
+        compatible:
+          contains:
+            const: apple,t6020-pcie
+    then:
+      properties:
+        reg-names:
+          minItems: 10
 
 examples:
   - |