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author | 2011-08-15 11:04:41 +0100 | |
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committer | 2011-08-15 11:58:59 +0100 | |
commit | 145e10e173c8adf4804334fb0dd10028300a7a7a (patch) | |
tree | 37409358acf86db952e0216fa528d289eef4fc4d /arch/arm/mach-imx/mach-cpuimx27.c | |
parent | ARM: 7014/1: cache-l2x0: Fix L2 Cache size calculation. (diff) | |
download | linux-rng-145e10e173c8adf4804334fb0dd10028300a7a7a.tar.xz linux-rng-145e10e173c8adf4804334fb0dd10028300a7a7a.zip |
ARM: 7015/1: ARM errata: Possible cache data corruption with hit-under-miss enabled
This patch is a workaround for the 364296 ARM1136 r0p2 erratum (possible
cache data corruption with hit-under-miss enabled). It sets the
undocumented bit 31 in the auxiliary control register and the FI bit in
the control register, thus disabling hit-under-miss without putting the
processor into full low interrupt latency mode.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Tested-by: Siarhei Siamashka <siarhei.siamashka@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-imx/mach-cpuimx27.c')
0 files changed, 0 insertions, 0 deletions