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| author |   John Crispin <blogic@openwrt.org> | 2013-01-19 08:54:26 +0000 |
|---|---|---|
| committer | John Crispin <blogic@openwrt.org> | 2013-02-17 00:15:17 +0100 |
| commit | bae696a267d81ea268f4de1e396b8c82154f22ed (patch) | |
| tree | a0d7b008010d7938c14039caefbac8df81e714bf /arch/mips/netlogic/common/smp.c | |
| parent | MIPS: lantiq: add GPHY clock gate bits (diff) | |
| download | linux-rng-bae696a267d81ea268f4de1e396b8c82154f22ed.tar.xz linux-rng-bae696a267d81ea268f4de1e396b8c82154f22ed.zip | |
MIPS: lantiq: improve pci reset gpio handling
We need to make sure that the reset gpio is available and also set a sane
default state.
Signed-off-by: John Crispin <blogic@openwrt.org>
Patchwork: http://patchwork.linux-mips.org/patch/4817/
Diffstat (limited to 'arch/mips/netlogic/common/smp.c')
0 files changed, 0 insertions, 0 deletions