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| author |   Samuel Zhang <guoqing.zhang@amd.com> | 2025-05-08 14:36:35 +0800 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2025-06-18 12:19:15 -0400 |
| commit | 4108c2be12ebe78accb40d43f4713a7cc481b18a (patch) | |
| tree | c3c8e9f0679ee0968f0262d9cb43418b7aa2413e /drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | |
| parent | drm/amdgpu: enable pdb0 for hibernation on SRIOV (diff) | |
| download | linux-rng-4108c2be12ebe78accb40d43f4713a7cc481b18a.tar.xz linux-rng-4108c2be12ebe78accb40d43f4713a7cc481b18a.zip | |
drm/amdgpu: fix fence fallback timer expired error
IH is not working after switching a new gpu index for the first time.
During VM resume, QEMU programming of VF MSIX table (register GFXMSIX_VECT0_ADDR_LO)
may not work.The access could be blocked by nBIF protection as VF isn't in
exclusive access mode. Exclusive access is enabled now, disable/enable MSIX
so that QEMU reprograms MSIX table.
call amdgpu_restore_msix on resume to restore msix table.
Signed-off-by: Samuel Zhang <guoqing.zhang@amd.com>
Acked-by: Lijo Lazar <lijo.lazar@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c')
| -rw-r--r-- | drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c index 5517451fc75d..56d973faca41 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_irq.c @@ -242,7 +242,7 @@ static bool amdgpu_msi_ok(struct amdgpu_device *adev) return true; } -static void amdgpu_restore_msix(struct amdgpu_device *adev) +void amdgpu_restore_msix(struct amdgpu_device *adev) { u16 ctrl; |