diff options
| author |   Samson Tam <samson.tam@amd.com> | 2022-08-05 18:41:01 -0400 |
|---|---|---|
| committer |   Alex Deucher <alexander.deucher@amd.com> | 2022-08-25 13:34:26 -0400 |
| commit | f577c7c76bf9f0e0a6dd3daf5b9a3d3f2b3880cc (patch) | |
| tree | a80b46324e219400f27cabab47c4b74d2a521c61 /drivers/gpu/drm/amd/display | |
| parent | drm/amd/display: do not change pipe split policy for RV2 (diff) | |
| download | linux-rng-f577c7c76bf9f0e0a6dd3daf5b9a3d3f2b3880cc.tar.xz linux-rng-f577c7c76bf9f0e0a6dd3daf5b9a3d3f2b3880cc.zip | |
drm/amd/display: fix odm 2:1 policy not being applied consistently in 4k144 modes
[Why]
odm 2:1 policy is splitting the pipes in 4k144.
then in subvp code, we merge the pipes. but since the
configuration is unsupported, we keep the pipes split
[How]
for unsupported subvp configuration, redo the dml and
pipe split calls
Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Brian Chang <Brian.Chang@amd.com>
Signed-off-by: Samson Tam <samson.tam@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display')
| -rw-r--r-- | drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c | 5 |
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c index 8118cfc5b405..edefb3fc1c3c 100644 --- a/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c +++ b/drivers/gpu/drm/amd/display/dc/dml/dcn32/dcn32_fpu.c @@ -1082,6 +1082,11 @@ static void dcn32_full_validate_bw_helper(struct dc *dc, dc->res_pool->funcs->remove_phantom_pipes(dc, context); vba->DRAMClockChangeSupport[*vlevel][vba->maxMpcComb] = dm_dram_clock_change_unsupported; *pipe_cnt = dc->res_pool->funcs->populate_dml_pipes(dc, context, pipes, false); + + *vlevel = dml_get_voltage_level(&context->bw_ctx.dml, pipes, *pipe_cnt); + /* This may adjust vlevel and maxMpcComb */ + if (*vlevel < context->bw_ctx.dml.soc.num_states) + *vlevel = dcn20_validate_apply_pipe_split_flags(dc, context, *vlevel, split, merge); } else { // only call dcn20_validate_apply_pipe_split_flags if we found a supported config memset(split, 0, MAX_PIPES * sizeof(int)); |