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authorChris Wilson <chris@chris-wilson.co.uk>2011-01-04 18:42:07 +0000
committerChris Wilson <chris@chris-wilson.co.uk>2011-01-11 20:42:53 +0000
commit63256ec5347fb2344a42adbae732b90603c92f35 (patch)
tree5b018e93f38f9e90f3b07beeaac4af08122c5876 /kernel/workqueue.c
parentdrm/i915: Remove impossible test (diff)
downloadlinux-rng-63256ec5347fb2344a42adbae732b90603c92f35.tar.xz
linux-rng-63256ec5347fb2344a42adbae732b90603c92f35.zip
drm/i915: Enforce write ordering through the GTT
We need to ensure that writes through the GTT land before any modification to the MMIO registers and so must impose a mandatory write barrier when flushing the GTT domain. This was revealed by relaxing the write ordering by experimentally mapping the registers and the GATT as write-combining. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
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