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| author | 2025-10-15 19:40:46 +0100 | |
|---|---|---|
| committer | 2025-10-15 19:40:46 +0100 | |
| commit | 760951dd19c2ebf55214e0cb259e4494098dfc9b (patch) | |
| tree | debbbace6fbd8d9ded28dfd45a8295a27cf9666c /net/openvswitch/ssh:/git@git.zx2c4.com/git: | |
| parent | spi: amlogic: fix spifc build error (diff) | |
| parent | spi: spi-nxp-fspi: limit the clock rate for different sample clock source selection (diff) | |
spi: spi-nxp-fspi: few fix for flexspi
Merge series from Haibo Chen <haibo.chen@nxp.com>:
PATCH 1: different operations maybe require different max frequency, so
add flexspi to handle such case, re-config the clock rate when
new coming operation require new clock frequency.
Patch 2: add workaround for erratum ERR050272. Since only add 4us dealy
in nxp_fspi_dll_calibration(), so do not distinguish different
platforms.
Patch 3: add max frequency limitation for different sample clock source
selection. Datasheet give max 66MHz for mode 0 and 166MHz for
mode 3. And IC suggest to add this limitation on all SoCs for
safety and stability.
Diffstat (limited to 'net/openvswitch/ssh:/git@git.zx2c4.com/git:')
0 files changed, 0 insertions, 0 deletions
