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| author |   Biao Huang <biao.huang@mediatek.com> | 2019-12-16 13:39:57 +0800 |
|---|---|---|
| committer |   David S. Miller <davem@davemloft.net> | 2019-12-17 13:48:30 -0800 |
| commit | 71a55a2315b047352b3d65e2d24724207be85ae2 (patch) | |
| tree | 31e28a3b997db7c6ea380a884a66d43b7a86eddd /net/tipc | |
| parent | Merge branch 'improve-clause-45-support-in-phylink' (diff) | |
| download | linux-rng-71a55a2315b047352b3d65e2d24724207be85ae2.tar.xz linux-rng-71a55a2315b047352b3d65e2d24724207be85ae2.zip | |
net-next: stmmac: mediatek: add more support for RMII
MT2712 SoC can provide the rmii reference clock, and the clock
will output from TXC pin only, which means ref_clk pin of external
PHY should connect to TXC pin in this case.
Add corresponding clock and timing settings.
Signed-off-by: Biao Huang <biao.huang@mediatek.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net/tipc')
0 files changed, 0 insertions, 0 deletions