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author | 2016-04-25 22:54:20 +0200 | |
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committer | 2016-04-25 22:54:20 +0200 | |
commit | 0a45e16a545b42c5d8439bb56a15cf8fbc7af441 (patch) | |
tree | 9f985dd4b9604937fba80832c3cb9d311a1922a3 /scripts/gdb/linux/utils.py | |
parent | Merge tag 'xgene-dts-for-v4.7-part1' of https://github.com/AppliedMicro/xgene-next into next/dt64 (diff) | |
parent | arm64: dts: NS2 secondary core enablement via PSCI (diff) | |
download | linux-rng-0a45e16a545b42c5d8439bb56a15cf8fbc7af441.tar.xz linux-rng-0a45e16a545b42c5d8439bb56a15cf8fbc7af441.zip |
Merge tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux into next/dt64
Pull "Broadcom ARM64-based SoC Device Tree changes" from Florian Fainelli:
- Anup enables a bunch of standard peripherals in the Northstar 2 DTS: PL330
DMA, GIC maintenance interrupt, PL022 SPI controller
- Anup also re-orgnanizes the clock Device Tree fragments into a separate file
for consistency with how other Broadcom SoCs are doing this
- Luke switches the SMP enable-method and reboot from a spin-table + syscon to
the standard PSCI 1.0 firmware interface
* tag 'arm-soc/for-4.7/devicetree-arm64' of http://github.com/Broadcom/stblinux:
arm64: dts: NS2 secondary core enablement via PSCI
arm64: dts: Add ARM PL022 SPI DT nodes for NS2
arm64: dts: Move NS2 clock DT nodes to separate DT file
arm64: dts: Add maintenance interrupt for GIC in NS2 DT
arm64: dts: Add ARM PL330 DMA DT node for NS2
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