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| author |   Len Brown <len.brown@intel.com> | 2015-03-27 20:54:01 -0400 |
|---|---|---|
| committer | Len Brown <len.brown@intel.com> | 2015-03-31 21:57:15 -0400 |
| commit | cab07a5652d1d124b505c2b7ed21c6823295c5d7 (patch) | |
| tree | d3944fd4847add04e7afb337ecb3d4e152ea7618 /scripts/gdb/linux/utils.py | |
| parent | intel_idle: Update support for Silvermont Core in Baytrail SOC (diff) | |
| download | linux-rng-cab07a5652d1d124b505c2b7ed21c6823295c5d7.tar.xz linux-rng-cab07a5652d1d124b505c2b7ed21c6823295c5d7.zip | |
intel_idle: Add support for the Airmont Core in the Cherrytrail and Braswell SOCs
Support C-states for the Airmont core in the Cherrytrail and Braswell SOCs.
The states are similar to those of Silvermont in Baytrail,
except both flavors of C6 states are faster.
Signed-off-by: Len Brown <len.brown@intel.com>
Cc: Kumar P Mahesh <mahesh.kumar.p@intel.com>
Cc: Alan Cox <alan@linux.intel.com>
Cc: Mika Westerberg <mika.westerberg@linux.intel.com>
Diffstat (limited to 'scripts/gdb/linux/utils.py')
0 files changed, 0 insertions, 0 deletions