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| author |   Linus Torvalds <torvalds@linux-foundation.org> | 2023-03-24 09:52:26 -0700 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2023-03-24 09:52:26 -0700 |
| commit | 19a6b66ca5244203214726376fda978cda2fc488 (patch) | |
| tree | 6cf7af319e63bbc817f84f83fac7ea83bd877eb7 /scripts/generate_rust_analyzer.py | |
| parent | Merge tag 'for-linus-6.3-rc4-tag' of git://git.kernel.org/pub/scm/linux/kernel/git/xen/tip (diff) | |
| parent | riscv: Handle zicsr/zifencei issues between clang and binutils (diff) | |
| download | linux-rng-19a6b66ca5244203214726376fda978cda2fc488.tar.xz linux-rng-19a6b66ca5244203214726376fda978cda2fc488.zip | |
Merge tag 'riscv-for-linus-6.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux
Pull RISC-V fixes from Palmer Dabbelt:
- A fix to match the CSR ASID masking rules when passing ASIDs to
firmware
- Force GCC to use ISA 2.2, to avoid a host of compatibily issues
between toolchains
* tag 'riscv-for-linus-6.3-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/riscv/linux:
riscv: Handle zicsr/zifencei issues between clang and binutils
riscv: mm: Fix incorrect ASID argument when flushing TLB
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions