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| author |   Varshini Rajendran <varshini.rajendran@microchip.com> | 2024-07-29 12:38:11 +0530 |
|---|---|---|
| committer |   Claudiu Beznea <claudiu.beznea@tuxon.dev> | 2024-08-07 19:16:48 +0300 |
| commit | 33013b43e2715c7e061ae052825edd87fd278330 (patch) | |
| tree | 487d2ff92dc12ff03b9bc842b382bcd6fc7fdad8 /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: clock: at91: Allow PLLs to be exported and referenced in DT (diff) | |
| download | linux-rng-33013b43e2715c7e061ae052825edd87fd278330.tar.xz linux-rng-33013b43e2715c7e061ae052825edd87fd278330.zip | |
clk: at91: sam9x7: add sam9x7 pmc driver
Add a driver for the PMC clocks of sam9x7 Soc family.
Signed-off-by: Varshini Rajendran <varshini.rajendran@microchip.com>
Link: https://lore.kernel.org/r/20240729070811.1990964-1-varshini.rajendran@microchip.com
Signed-off-by: Claudiu Beznea <claudiu.beznea@tuxon.dev>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions