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| author |   Sunyeal Hong <sunyeal.hong@samsung.com> | 2024-08-22 08:26:52 +0900 |
|---|---|---|
| committer |   Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2024-08-23 09:21:35 +0200 |
| commit | 485e13fe2fb649e60eb49d8bec4404da215c1f5b (patch) | |
| tree | 790b4bbf03bf9cfa19e5a5eb80f806b06e0c7b99 /scripts/generate_rust_analyzer.py | |
| parent | clk: samsung: clk-pll: Add support for pll_531x (diff) | |
| download | linux-rng-485e13fe2fb649e60eb49d8bec4404da215c1f5b.tar.xz linux-rng-485e13fe2fb649e60eb49d8bec4404da215c1f5b.zip | |
clk: samsung: add top clock support for ExynosAuto v920 SoC
This adds support for CMU_TOP which generates clocks for all the
function blocks such as CORE, HSI0/1/2, PERIC0/1 and so on. For
CMU_TOP, PLL_SHARED0,1,2,3,4 and 5 will be the sources of this block
and they will generate bus clocks.
Signed-off-by: Sunyeal Hong <sunyeal.hong@samsung.com>
Link: https://lore.kernel.org/r/20240821232652.1077701-5-sunyeal.hong@samsung.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions