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authorBjorn Helgaas <bhelgaas@google.com>2025-01-23 13:05:06 -0600
committerBjorn Helgaas <bhelgaas@google.com>2025-01-23 13:05:06 -0600
commit4d3bf4e8450cf99667b0938850f72389792082b8 (patch)
treefa6c7af16ae86a65b79a444b2f18d0a0ab94db7f /scripts/generate_rust_analyzer.py
parentMerge branch 'pci/controller/rockchip' (diff)
parentPCI: xilinx-cpm: Add support for Versal CPM5 Root Port Controller 1 (diff)
downloadlinux-rng-4d3bf4e8450cf99667b0938850f72389792082b8.tar.xz
linux-rng-4d3bf4e8450cf99667b0938850f72389792082b8.zip
Merge branch 'pci/controller/xilinx-cpm'
- Add DT binding and driver support for Xilinx Versal CPM5 (Thippeswamy Havalige) * pci/controller/xilinx-cpm: PCI: xilinx-cpm: Add support for Versal CPM5 Root Port Controller 1 dt-bindings: PCI: xilinx-cpm: Add compatible string for CPM5 host1
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
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